Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu: (89 commits) AMD IOMMU: remove now unnecessary #ifdefs AMD IOMMU: prealloc_protection_domains should be static kvm/iommu: fix compile warning AMD IOMMU: add statistics about total number of map requests AMD IOMMU: add statistics about allocated io memory AMD IOMMU: add stats counter for domain tlb flushes AMD IOMMU: add stats counter for single iommu domain tlb flushes AMD IOMMU: add stats counter for cross-page request AMD IOMMU: add stats counter for free_coherent requests AMD IOMMU: add stats counter for alloc_coherent requests AMD IOMMU: add stats counter for unmap_sg requests AMD IOMMU: add stats counter for map_sg requests AMD IOMMU: add stats counter for unmap_single requests AMD IOMMU: add stats counter for map_single requests AMD IOMMU: add stats counter for completion wait events AMD IOMMU: add init code for statistic collection AMD IOMMU: add necessary header defines for stats counting AMD IOMMU: add Kconfig entry for statistic collection code AMD IOMMU: use dev_name in iommu_enable function AMD IOMMU: use calc_devid in prealloc_protection_domains ...
This commit is contained in:
Linus Torvalds
@@ -9,148 +9,16 @@
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#define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
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#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
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#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)
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#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK)
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#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK)
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/*
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* 0: Present
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* 1-11: Reserved
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* 12-63: Context Ptr (12 - (haw-1))
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* 64-127: Reserved
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*/
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struct root_entry {
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u64 val;
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u64 rsvd1;
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};
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#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
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static inline bool root_present(struct root_entry *root)
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{
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return (root->val & 1);
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}
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static inline void set_root_present(struct root_entry *root)
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{
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root->val |= 1;
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}
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static inline void set_root_value(struct root_entry *root, unsigned long value)
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{
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root->val |= value & VTD_PAGE_MASK;
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}
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struct context_entry;
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static inline struct context_entry *
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get_context_addr_from_root(struct root_entry *root)
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{
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return (struct context_entry *)
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(root_present(root)?phys_to_virt(
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root->val & VTD_PAGE_MASK) :
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NULL);
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}
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/*
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* low 64 bits:
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* 0: present
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* 1: fault processing disable
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* 2-3: translation type
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* 12-63: address space root
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* high 64 bits:
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* 0-2: address width
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* 3-6: aval
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* 8-23: domain id
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*/
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struct context_entry {
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u64 lo;
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u64 hi;
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};
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#define context_present(c) ((c).lo & 1)
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#define context_fault_disable(c) (((c).lo >> 1) & 1)
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#define context_translation_type(c) (((c).lo >> 2) & 3)
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#define context_address_root(c) ((c).lo & VTD_PAGE_MASK)
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#define context_address_width(c) ((c).hi & 7)
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#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1))
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#define context_set_present(c) do {(c).lo |= 1;} while (0)
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#define context_set_fault_enable(c) \
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do {(c).lo &= (((u64)-1) << 2) | 1;} while (0)
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#define context_set_translation_type(c, val) \
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do { \
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(c).lo &= (((u64)-1) << 4) | 3; \
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(c).lo |= ((val) & 3) << 2; \
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} while (0)
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#define CONTEXT_TT_MULTI_LEVEL 0
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#define context_set_address_root(c, val) \
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do {(c).lo |= (val) & VTD_PAGE_MASK; } while (0)
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#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0)
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#define context_set_domain_id(c, val) \
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do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0)
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#define context_clear_entry(c) do {(c).lo = 0; (c).hi = 0;} while (0)
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/*
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* 0: readable
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* 1: writable
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* 2-6: reserved
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* 7: super page
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* 8-11: available
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* 12-63: Host physcial address
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*/
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struct dma_pte {
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u64 val;
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};
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#define dma_clear_pte(p) do {(p).val = 0;} while (0)
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#define DMA_PTE_READ (1)
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#define DMA_PTE_WRITE (2)
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#define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while (0)
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#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0)
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#define dma_set_pte_prot(p, prot) \
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do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
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#define dma_pte_addr(p) ((p).val & VTD_PAGE_MASK)
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#define dma_set_pte_addr(p, addr) do {\
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(p).val |= ((addr) & VTD_PAGE_MASK); } while (0)
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#define dma_pte_present(p) (((p).val & 3) != 0)
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struct intel_iommu;
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struct dmar_domain;
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struct root_entry;
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struct dmar_domain {
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int id; /* domain id */
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struct intel_iommu *iommu; /* back pointer to owning iommu */
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struct list_head devices; /* all devices' list */
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struct iova_domain iovad; /* iova's that belong to this domain */
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struct dma_pte *pgd; /* virtual address */
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spinlock_t mapping_lock; /* page table lock */
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int gaw; /* max guest address width */
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/* adjusted guest address width, 0 is level 2 30-bit */
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int agaw;
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#define DOMAIN_FLAG_MULTIPLE_DEVICES 1
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int flags;
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};
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/* PCI domain-device relationship */
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struct device_domain_info {
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struct list_head link; /* link to domain siblings */
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struct list_head global; /* link to global list */
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u8 bus; /* PCI bus numer */
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u8 devfn; /* PCI devfn number */
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struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
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struct dmar_domain *domain; /* pointer to domain */
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};
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extern int init_dmars(void);
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extern void free_dmar_iommu(struct intel_iommu *iommu);
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extern int iommu_calculate_agaw(struct intel_iommu *iommu);
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extern int dmar_disabled;
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#ifndef CONFIG_DMAR_GFX_WA
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static inline void iommu_prepare_gfx_mapping(void)
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{
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return;
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}
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#endif /* !CONFIG_DMAR_GFX_WA */
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#endif
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@@ -144,7 +144,6 @@ struct dmar_rmrr_unit {
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list_for_each_entry(rmrr, &dmar_rmrr_units, list)
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/* Intel DMAR initialization functions */
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extern int intel_iommu_init(void);
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extern int dmar_disabled;
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#else
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static inline int intel_iommu_init(void)
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{
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@@ -23,8 +23,6 @@
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#define _INTEL_IOMMU_H_
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#include <linux/types.h>
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#include <linux/msi.h>
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#include <linux/sysdev.h>
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#include <linux/iova.h>
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#include <linux/io.h>
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#include <linux/dma_remapping.h>
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@@ -289,10 +287,10 @@ struct intel_iommu {
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void __iomem *reg; /* Pointer to hardware regs, virtual addr */
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u64 cap;
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u64 ecap;
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int seg;
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u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */
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spinlock_t register_lock; /* protect register handling */
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int seq_id; /* sequence id of the iommu */
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int agaw; /* agaw of this iommu */
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#ifdef CONFIG_DMAR
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unsigned long *domain_ids; /* bitmap of domains */
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@@ -302,8 +300,6 @@ struct intel_iommu {
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unsigned int irq;
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unsigned char name[7]; /* Device Name */
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struct msi_msg saved_msg;
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struct sys_device sysdev;
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struct iommu_flush flush;
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#endif
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struct q_inval *qi; /* Queued invalidation info */
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@@ -334,25 +330,6 @@ extern int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
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extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
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void intel_iommu_domain_exit(struct dmar_domain *domain);
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struct dmar_domain *intel_iommu_domain_alloc(struct pci_dev *pdev);
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int intel_iommu_context_mapping(struct dmar_domain *domain,
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struct pci_dev *pdev);
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int intel_iommu_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
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u64 hpa, size_t size, int prot);
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void intel_iommu_detach_dev(struct dmar_domain *domain, u8 bus, u8 devfn);
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struct dmar_domain *intel_iommu_find_domain(struct pci_dev *pdev);
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u64 intel_iommu_iova_to_pfn(struct dmar_domain *domain, u64 iova);
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#ifdef CONFIG_DMAR
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int intel_iommu_found(void);
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#else /* CONFIG_DMAR */
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static inline int intel_iommu_found(void)
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{
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return 0;
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}
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#endif /* CONFIG_DMAR */
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extern void *intel_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
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extern void intel_free_coherent(struct device *, size_t, void *, dma_addr_t);
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extern dma_addr_t intel_map_single(struct device *, phys_addr_t, size_t, int);
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112
include/linux/iommu.h
Normal file
112
include/linux/iommu.h
Normal file
@@ -0,0 +1,112 @@
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/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#define IOMMU_READ (1)
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#define IOMMU_WRITE (2)
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struct device;
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struct iommu_domain {
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void *priv;
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};
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struct iommu_ops {
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int (*domain_init)(struct iommu_domain *domain);
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void (*domain_destroy)(struct iommu_domain *domain);
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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void (*unmap)(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
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unsigned long iova);
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};
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#ifdef CONFIG_IOMMU_API
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extern void register_iommu(struct iommu_ops *ops);
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extern bool iommu_found(void);
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extern struct iommu_domain *iommu_domain_alloc(void);
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extern void iommu_domain_free(struct iommu_domain *domain);
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extern int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev);
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extern void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev);
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extern int iommu_map_range(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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extern void iommu_unmap_range(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova);
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#else /* CONFIG_IOMMU_API */
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static inline void register_iommu(struct iommu_ops *ops)
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{
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}
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static inline bool iommu_found(void)
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{
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return false;
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}
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static inline struct iommu_domain *iommu_domain_alloc(void)
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{
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return NULL;
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}
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static inline void iommu_domain_free(struct iommu_domain *domain)
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{
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}
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static inline int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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return -ENODEV;
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}
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static inline void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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}
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static inline int iommu_map_range(struct iommu_domain *domain,
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unsigned long iova, phys_addr_t paddr,
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size_t size, int prot)
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{
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return -ENODEV;
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}
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static inline void iommu_unmap_range(struct iommu_domain *domain,
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unsigned long iova, size_t size)
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{
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}
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static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova)
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{
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return 0;
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}
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#endif /* CONFIG_IOMMU_API */
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#endif /* __LINUX_IOMMU_H */
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@@ -316,6 +316,7 @@ struct kvm_assigned_dev_kernel {
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#define KVM_ASSIGNED_DEV_HOST_MSI (1 << 9)
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unsigned long irq_requested_type;
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int irq_source_id;
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int flags;
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struct pci_dev *dev;
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struct kvm *kvm;
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};
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@@ -327,13 +328,16 @@ void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian);
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int kvm_request_irq_source_id(struct kvm *kvm);
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void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id);
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_IOMMU_API
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int kvm_iommu_map_pages(struct kvm *kvm, gfn_t base_gfn,
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unsigned long npages);
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int kvm_iommu_map_guest(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev);
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int kvm_iommu_map_guest(struct kvm *kvm);
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int kvm_iommu_unmap_guest(struct kvm *kvm);
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#else /* CONFIG_DMAR */
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int kvm_assign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev);
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int kvm_deassign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev);
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#else /* CONFIG_IOMMU_API */
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static inline int kvm_iommu_map_pages(struct kvm *kvm,
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gfn_t base_gfn,
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unsigned long npages)
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@@ -341,9 +345,7 @@ static inline int kvm_iommu_map_pages(struct kvm *kvm,
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return 0;
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}
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static inline int kvm_iommu_map_guest(struct kvm *kvm,
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struct kvm_assigned_dev_kernel
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*assigned_dev)
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static inline int kvm_iommu_map_guest(struct kvm *kvm)
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{
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return -ENODEV;
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}
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@@ -352,7 +354,19 @@ static inline int kvm_iommu_unmap_guest(struct kvm *kvm)
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{
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return 0;
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}
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#endif /* CONFIG_DMAR */
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static inline int kvm_assign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev)
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{
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return 0;
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}
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static inline int kvm_deassign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev)
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{
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return 0;
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}
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#endif /* CONFIG_IOMMU_API */
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static inline void kvm_guest_enter(void)
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{
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