From 2f3e71caaac8a9dcb7dc3c8b8b14f845d57044e9 Mon Sep 17 00:00:00 2001 From: Carter Cooper Date: Mon, 20 Aug 2012 22:11:42 -0600 Subject: [PATCH] msm: kgsl: Enable GPU to use multiple IOMMU devices Set the defualt IOMMU count to two for the GPU. If the device is 8960 (ie not 8960PRO), set the IOMMU count to one and let kgsl take care of initializing only one IOMMU device. Change-Id: I736a6d6744c4359ec5cc923d6eddd652451c81a1 Signed-off-by: Carter Cooper Signed-off-by: Gopal Goberu --- arch/arm/mach-msm/board-8960.c | 25 ++++++++++++++++--------- arch/arm/mach-msm/devices-8960.c | 17 ++++++++++++++--- 2 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c index 8ee6a5ce83b..1ee38a46235 100644 --- a/arch/arm/mach-msm/board-8960.c +++ b/arch/arm/mach-msm/board-8960.c @@ -2859,17 +2859,24 @@ static void __init msm8960_gfx_init(void) msm_kgsl_3d0.dev.platform_data; uint32_t soc_platform_version = socinfo_get_version(); + /* Fixup data that needs to change based on GPU ID */ if (cpu_is_msm8960ab()) { kgsl_3d0_pdata->chipid = ADRENO_CHIPID(3, 2, 1, 0); - } else if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) { - kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000; - kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000; - } else if (SOCINFO_VERSION_MAJOR(soc_platform_version) >= 3) { - /* 8960v3 GPU registers returns 5 for patch release - * but it should be 6, so dummy up the chipid here - * based the platform type - */ - kgsl_3d0_pdata->chipid = ADRENO_CHIPID(2, 2, 0, 6); + /* 8960PRO nominal clock rate is 325Mhz instead of 320Mhz */ + kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 325000000; + } else { + kgsl_3d0_pdata->iommu_count = 1; + if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) { + kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000; + kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000; + } + if (SOCINFO_VERSION_MAJOR(soc_platform_version) >= 3) { + /* 8960v3 GPU registers returns 5 for patch release + * but it should be 6, so dummy up the chipid here + * based the platform type + */ + kgsl_3d0_pdata->chipid = ADRENO_CHIPID(2, 2, 0, 6); + } } /* Register the 3D core */ diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c index 3b34b2a39bc..008236f7ef9 100644 --- a/arch/arm/mach-msm/devices-8960.c +++ b/arch/arm/mach-msm/devices-8960.c @@ -3189,18 +3189,29 @@ static struct resource kgsl_3d0_resources[] = { }, }; -static const struct kgsl_iommu_ctx kgsl_3d0_iommu_ctxs[] = { +static const struct kgsl_iommu_ctx kgsl_3d0_iommu0_ctxs[] = { { "gfx3d_user", 0 }, { "gfx3d_priv", 1 }, }; +static const struct kgsl_iommu_ctx kgsl_3d0_iommu1_ctxs[] = { + { "gfx3d1_user", 0 }, + { "gfx3d1_priv", 1 }, +}; + static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = { { - .iommu_ctxs = kgsl_3d0_iommu_ctxs, - .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu_ctxs), + .iommu_ctxs = kgsl_3d0_iommu0_ctxs, + .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctxs), .physstart = 0x07C00000, .physend = 0x07C00000 + SZ_1M - 1, }, + { + .iommu_ctxs = kgsl_3d0_iommu1_ctxs, + .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu1_ctxs), + .physstart = 0x07D00000, + .physend = 0x07D00000 + SZ_1M - 1, + }, }; static struct kgsl_device_platform_data kgsl_3d0_pdata = {