USB: OTG: msm: Add support for SRP and HNP
This patch changes OTG driver to support different OTG statemachine states for OTG2.0 complaince. It will also enable to swap Host role between two OTG devices via HNP and enable B device to request A device to start VBUS session via SRP. Change-Id: Ibe2519ff1570768f51e879af483a6f5c23b38d8f Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
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committed by
Stephen Boyd
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9d45004c83
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@@ -187,6 +187,46 @@ struct msm_otg_platform_data {
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struct msm_bus_scale_pdata *bus_scale_table;
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struct msm_bus_scale_pdata *bus_scale_table;
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};
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};
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/* Timeout (in msec) values (min - max) associated with OTG timers */
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#define TA_WAIT_VRISE 100 /* ( - 100) */
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#define TA_WAIT_VFALL 500 /* ( - 1000) */
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/*
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* This option is set for embedded hosts or OTG devices in which leakage
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* currents are very minimal.
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*/
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#ifdef CONFIG_USB_OTG
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#define TA_WAIT_BCON 30000 /* (1100 - 30000) */
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#else
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#define TA_WAIT_BCON -1
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#endif
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#define TA_AIDL_BDIS 500 /* (200 - ) */
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#define TA_BIDL_ADIS 155 /* (155 - 200) */
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#define TB_SRP_FAIL 6000 /* (5000 - 6000) */
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#define TB_ASE0_BRST 200 /* (155 - ) */
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/* TB_SSEND_SRP and TB_SE0_SRP are combined */
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#define TB_SRP_INIT 2000 /* (1500 - ) */
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#define TA_TST_MAINT 10100 /* (9900 - 10100) */
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#define TB_TST_SRP 3000 /* ( - 5000) */
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#define TB_TST_CONFIG 300
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/* Timeout variables */
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#define A_WAIT_VRISE 0
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#define A_WAIT_VFALL 1
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#define A_WAIT_BCON 2
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#define A_AIDL_BDIS 3
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#define A_BIDL_ADIS 4
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#define B_SRP_FAIL 5
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#define B_ASE0_BRST 6
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#define A_TST_MAINT 7
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#define B_TST_SRP 8
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#define B_TST_CONFIG 9
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/**
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/**
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* struct msm_otg: OTG driver data. Shared by HCD and DCD.
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* struct msm_otg: OTG driver data. Shared by HCD and DCD.
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* @otg: USB OTG Transceiver structure.
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* @otg: USB OTG Transceiver structure.
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@@ -233,6 +273,18 @@ struct msm_otg {
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#define ID_A 2
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#define ID_A 2
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#define ID_B 3
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#define ID_B 3
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#define ID_C 4
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#define ID_C 4
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#define A_BUS_DROP 5
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#define A_BUS_REQ 6
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#define A_SRP_DET 7
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#define A_VBUS_VLD 8
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#define B_CONN 9
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#define ADP_CHANGE 10
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#define POWER_UP 11
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#define A_CLR_ERR 12
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#define A_BUS_RESUME 13
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#define A_BUS_SUSPEND 14
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#define A_CONN 15
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#define B_BUS_REQ 16
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unsigned long inputs;
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unsigned long inputs;
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struct work_struct sm_work;
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struct work_struct sm_work;
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atomic_t in_lpm;
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atomic_t in_lpm;
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@@ -273,6 +325,10 @@ struct msm_otg {
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#define PHY_OTG_COMP_DISABLED BIT(2)
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#define PHY_OTG_COMP_DISABLED BIT(2)
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struct pm_qos_request_list pm_qos_req_dma;
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struct pm_qos_request_list pm_qos_req_dma;
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int reset_counter;
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int reset_counter;
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unsigned long b_last_se0_sess;
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unsigned long tmouts;
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u8 active_tmout;
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struct hrtimer timer;
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};
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};
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struct msm_hsic_host_platform_data {
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struct msm_hsic_host_platform_data {
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@@ -33,6 +33,8 @@
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#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
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#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
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#define PORTSC_PTS_MASK (3 << 30)
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#define PORTSC_PTS_MASK (3 << 30)
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#define PORTSC_PTS_ULPI (3 << 30)
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#define PORTSC_PTS_ULPI (3 << 30)
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#define PORTSC_CSC (1 << 1)
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#define PORTSC_CCS (1 << 0)
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#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
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#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
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#define ULPI_RUN (1 << 30)
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#define ULPI_RUN (1 << 30)
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@@ -54,14 +56,26 @@
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#define PHY_IDHV_INTEN (1 << 8) /* PHY ID HV interrupt */
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#define PHY_IDHV_INTEN (1 << 8) /* PHY ID HV interrupt */
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#define PHY_OTGSESSVLDHV_INTEN (1 << 9) /* PHY Session Valid HV int. */
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#define PHY_OTGSESSVLDHV_INTEN (1 << 9) /* PHY Session Valid HV int. */
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#define STS_PCI (1 << 2) /* R/WC - Port Change Detect */
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#define STS_URI (1 << 6) /* R/WC - RESET recv'd */
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#define STS_SLI (1 << 8) /* R/WC - suspend state entered */
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/* OTG definitions */
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/* OTG definitions */
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#define OTGSC_INTSTS_MASK (0x7f << 16)
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#define OTGSC_INTSTS_MASK (0x7f << 16)
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#define OTGSC_IDPU (1 << 5)
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#define OTGSC_IDPU (1 << 5)
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#define OTGSC_INTR_MASK (0x7f << 24)
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#define OTGSC_HADP (1 << 6)
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#define OTGSC_ID (1 << 8)
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#define OTGSC_ID (1 << 8)
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#define OTGSC_BSV (1 << 11)
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#define OTGSC_BSV (1 << 11)
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#define OTGSC_IDIS (1 << 16)
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#define OTGSC_IDIS (1 << 16)
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#define OTGSC_BSVIS (1 << 19)
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#define OTGSC_BSVIS (1 << 19)
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#define OTGSC_IDIE (1 << 24)
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#define OTGSC_IDIE (1 << 24)
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#define OTGSC_BSVIE (1 << 27)
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#define OTGSC_BSVIE (1 << 27)
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#define OTGSC_DPIE (1 << 30)
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#define OTGSC_DPIS (1 << 22)
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/* OTG interrupt status mask */
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#define OTG_USBSTS_MASK (STS_PCI | STS_URI | STS_SLI | PHY_ALT_INT)
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#define OTG_OTGSTS_MASK (OTGSC_IDIS | OTGSC_BSVIS | OTGSC_DPIS)
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#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */
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#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */
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