mfd: New AB8500 driver
Add a new driver to support the AB8500 Power Management chip, replacing the current AB4500. The new driver replaces the old one, instead of an incremental modification, because this is a substantial overhaul including: - Split of the driver into -core and -spi portions, to allow another interface layer to be added - Addition of interrupt support - Switch to MFD core API for handling subdevices - Simplification of the APIs to remove a redundant block parameter - Rename of the APIs and macros from ab4500_* to ab8500_* - Rename of the files from ab4500* to ab8500* - Change of the driver name from ab4500 to ab8500 Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Rabin Vincent
committed by
Samuel Ortiz
Samuel Ortiz
parent
75907a1153
commit
62579266cf
128
include/linux/mfd/ab8500.h
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128
include/linux/mfd/ab8500.h
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/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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* Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
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*/
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#ifndef MFD_AB8500_H
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#define MFD_AB8500_H
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#include <linux/device.h>
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/*
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* Interrupts
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*/
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#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
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#define AB8500_INT_UN_PLUG_TV_DET 1
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#define AB8500_INT_PLUG_TV_DET 2
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#define AB8500_INT_TEMP_WARM 3
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#define AB8500_INT_PON_KEY2DB_F 4
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#define AB8500_INT_PON_KEY2DB_R 5
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#define AB8500_INT_PON_KEY1DB_F 6
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#define AB8500_INT_PON_KEY1DB_R 7
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#define AB8500_INT_BATT_OVV 8
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#define AB8500_INT_MAIN_CH_UNPLUG_DET 10
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#define AB8500_INT_MAIN_CH_PLUG_DET 11
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#define AB8500_INT_USB_ID_DET_F 12
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#define AB8500_INT_USB_ID_DET_R 13
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#define AB8500_INT_VBUS_DET_F 14
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#define AB8500_INT_VBUS_DET_R 15
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#define AB8500_INT_VBUS_CH_DROP_END 16
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#define AB8500_INT_RTC_60S 17
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#define AB8500_INT_RTC_ALARM 18
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#define AB8500_INT_BAT_CTRL_INDB 20
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#define AB8500_INT_CH_WD_EXP 21
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#define AB8500_INT_VBUS_OVV 22
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#define AB8500_INT_MAIN_CH_DROP_END 23
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#define AB8500_INT_CCN_CONV_ACC 24
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#define AB8500_INT_INT_AUD 25
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#define AB8500_INT_CCEOC 26
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#define AB8500_INT_CC_INT_CALIB 27
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#define AB8500_INT_LOW_BAT_F 28
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#define AB8500_INT_LOW_BAT_R 29
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#define AB8500_INT_BUP_CHG_NOT_OK 30
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#define AB8500_INT_BUP_CHG_OK 31
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#define AB8500_INT_GP_HW_ADC_CONV_END 32
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#define AB8500_INT_ACC_DETECT_1DB_F 33
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#define AB8500_INT_ACC_DETECT_1DB_R 34
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#define AB8500_INT_ACC_DETECT_22DB_F 35
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#define AB8500_INT_ACC_DETECT_22DB_R 36
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#define AB8500_INT_ACC_DETECT_21DB_F 37
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#define AB8500_INT_ACC_DETECT_21DB_R 38
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#define AB8500_INT_GP_SW_ADC_CONV_END 39
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#define AB8500_INT_BTEMP_LOW 72
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#define AB8500_INT_BTEMP_LOW_MEDIUM 73
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#define AB8500_INT_BTEMP_MEDIUM_HIGH 74
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#define AB8500_INT_BTEMP_HIGH 75
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#define AB8500_INT_USB_CHARGER_NOT_OK 81
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#define AB8500_INT_ID_WAKEUP_R 82
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#define AB8500_INT_ID_DET_R1R 84
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#define AB8500_INT_ID_DET_R2R 85
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#define AB8500_INT_ID_DET_R3R 86
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#define AB8500_INT_ID_DET_R4R 87
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#define AB8500_INT_ID_WAKEUP_F 88
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#define AB8500_INT_ID_DET_R1F 90
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#define AB8500_INT_ID_DET_R2F 91
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#define AB8500_INT_ID_DET_R3F 92
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#define AB8500_INT_ID_DET_R4F 93
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#define AB8500_INT_USB_CHG_DET_DONE 94
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#define AB8500_INT_USB_CH_TH_PROT_F 96
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#define AB8500_INT_USB_CH_TH_PROP_R 97
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#define AB8500_INT_MAIN_CH_TH_PROP_F 98
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#define AB8500_INT_MAIN_CH_TH_PROT_R 99
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#define AB8500_INT_USB_CHARGER_NOT_OKF 103
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#define AB8500_NR_IRQS 104
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#define AB8500_NUM_IRQ_REGS 13
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/**
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* struct ab8500 - ab8500 internal structure
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* @dev: parent device
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* @lock: read/write operations lock
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* @irq_lock: genirq bus lock
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* @revision: chip revision
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* @irq: irq line
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* @write: register write
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* @read: register read
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* @rx_buf: rx buf for SPI
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* @tx_buf: tx buf for SPI
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* @mask: cache of IRQ regs for bus lock
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* @oldmask: cache of previous IRQ regs for bus lock
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*/
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struct ab8500 {
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struct device *dev;
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struct mutex lock;
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struct mutex irq_lock;
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int revision;
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int irq_base;
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int irq;
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int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
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int (*read) (struct ab8500 *a8500, u16 addr);
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unsigned long tx_buf[4];
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unsigned long rx_buf[4];
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u8 mask[AB8500_NUM_IRQ_REGS];
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u8 oldmask[AB8500_NUM_IRQ_REGS];
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};
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/**
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* struct ab8500_platform_data - AB8500 platform data
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* @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
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* @init: board-specific initialization after detection of ab8500
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*/
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struct ab8500_platform_data {
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int irq_base;
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void (*init) (struct ab8500 *);
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};
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extern int ab8500_write(struct ab8500 *a8500, u16 addr, u8 data);
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extern int ab8500_read(struct ab8500 *a8500, u16 addr);
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extern int ab8500_set_bits(struct ab8500 *a8500, u16 addr, u8 mask, u8 data);
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extern int __devinit ab8500_init(struct ab8500 *ab8500);
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extern int __devexit ab8500_exit(struct ab8500 *ab8500);
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#endif /* MFD_AB8500_H */
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