msm: footswitch-8x60: Allow specification of per-fs reset delays
Custom reset rates can be specified for clocks via fs_clk_data. If these rates are very low, then the default reset delay of 1us may not be sufficient. Address this by allowing custom reset delays to be specified on a per-footswitch bases. Change-Id: Id9b9377d79436a7fe5007a8f37216a456d66ce1a Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
This commit is contained in:
committed by
Iliyan Malchev
parent
547218fc14
commit
667dd0a4f3
@@ -1,4 +1,4 @@
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/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* it under the terms of the GNU General Public License version 2 and
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@@ -52,7 +52,7 @@
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#define GFS_DELAY_CNT 31
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#define GFS_DELAY_CNT 31
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#define RESET_DELAY_US 1
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#define DEFAULT_RESET_DELAY_US 1
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/* Clock rate to use if one has not previously been set. */
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/* Clock rate to use if one has not previously been set. */
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#define DEFAULT_RATE 27000000
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#define DEFAULT_RATE 27000000
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#define MAX_CLKS 10
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#define MAX_CLKS 10
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@@ -72,6 +72,7 @@ struct footswitch {
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bool is_claimed;
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bool is_claimed;
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struct fs_clk_data *clk_data;
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struct fs_clk_data *clk_data;
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struct clk *core_clk;
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struct clk *core_clk;
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unsigned long reset_delay_us;
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};
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};
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static int setup_clocks(struct footswitch *fs)
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static int setup_clocks(struct footswitch *fs)
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@@ -181,7 +182,7 @@ static int footswitch_enable(struct regulator_dev *rdev)
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for (clock--; clock >= fs->clk_data; clock--)
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for (clock--; clock >= fs->clk_data; clock--)
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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/* Wait for synchronous resets to propagate. */
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/* Wait for synchronous resets to propagate. */
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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/* Enable the power rail at the footswitch. */
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/* Enable the power rail at the footswitch. */
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regval |= ENABLE_BIT;
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regval |= ENABLE_BIT;
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@@ -204,9 +205,9 @@ static int footswitch_enable(struct regulator_dev *rdev)
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/* Toggle core reset again after first power-on (required for GFX3D). */
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/* Toggle core reset again after first power-on (required for GFX3D). */
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if (fs->desc.id == FS_GFX3D) {
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if (fs->desc.id == FS_GFX3D) {
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clk_reset(fs->core_clk, CLK_RESET_ASSERT);
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clk_reset(fs->core_clk, CLK_RESET_ASSERT);
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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clk_reset(fs->core_clk, CLK_RESET_DEASSERT);
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clk_reset(fs->core_clk, CLK_RESET_DEASSERT);
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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}
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}
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/* Prevent core memory from collapsing when its clock is gated. */
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/* Prevent core memory from collapsing when its clock is gated. */
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@@ -269,7 +270,7 @@ static int footswitch_disable(struct regulator_dev *rdev)
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for (clock--; clock >= fs->clk_data; clock--)
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for (clock--; clock >= fs->clk_data; clock--)
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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/* Wait for synchronous resets to propagate. */
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/* Wait for synchronous resets to propagate. */
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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/*
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/*
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* Return clocks to their state before this function. For robustness
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* Return clocks to their state before this function. For robustness
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@@ -346,7 +347,7 @@ static int gfx2d_footswitch_enable(struct regulator_dev *rdev)
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for (clock--; clock >= fs->clk_data; clock--)
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for (clock--; clock >= fs->clk_data; clock--)
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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clk_reset(clock->clk, CLK_RESET_ASSERT);
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/* Wait for synchronous resets to propagate. */
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/* Wait for synchronous resets to propagate. */
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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/* Enable the power rail at the footswitch. */
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/* Enable the power rail at the footswitch. */
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regval |= ENABLE_BIT;
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regval |= ENABLE_BIT;
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@@ -361,7 +362,7 @@ static int gfx2d_footswitch_enable(struct regulator_dev *rdev)
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/* Deassert resets for all clocks in the power domain. */
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/* Deassert resets for all clocks in the power domain. */
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for (clock = fs->clk_data; clock->clk; clock++)
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for (clock = fs->clk_data; clock->clk; clock++)
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clk_reset(clock->clk, CLK_RESET_DEASSERT);
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clk_reset(clock->clk, CLK_RESET_DEASSERT);
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udelay(RESET_DELAY_US);
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udelay(fs->reset_delay_us);
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/* Re-enable core clock. */
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/* Re-enable core clock. */
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clk_prepare_enable(fs->core_clk);
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clk_prepare_enable(fs->core_clk);
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@@ -504,6 +505,8 @@ static int footswitch_probe(struct platform_device *pdev)
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fs->clk_data = driver_data->clks;
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fs->clk_data = driver_data->clks;
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fs->bus_port0 = driver_data->bus_port0;
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fs->bus_port0 = driver_data->bus_port0;
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fs->bus_port1 = driver_data->bus_port1;
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fs->bus_port1 = driver_data->bus_port1;
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fs->reset_delay_us =
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driver_data->reset_delay_us ? : DEFAULT_RESET_DELAY_US;
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for (clock = fs->clk_data; clock->name; clock++) {
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for (clock = fs->clk_data; clock->name; clock++) {
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clock->clk = clk_get(&pdev->dev, clock->name);
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clock->clk = clk_get(&pdev->dev, clock->name);
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@@ -1,4 +1,4 @@
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/* Copyright (c) 2010-2012 The Linux Foundation. All rights reserved.
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/* Copyright (c) 2010-2013 The Linux Foundation. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* it under the terms of the GNU General Public License version 2 and
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@@ -41,6 +41,7 @@ struct fs_clk_data {
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struct fs_driver_data {
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struct fs_driver_data {
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int bus_port0, bus_port1;
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int bus_port0, bus_port1;
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struct fs_clk_data *clks;
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struct fs_clk_data *clks;
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unsigned long reset_delay_us;
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};
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};
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#define FS_GENERIC(_drv_name, _id, _name, _dev_id, _data) \
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#define FS_GENERIC(_drv_name, _id, _name, _dev_id, _data) \
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