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msm: footswitch-8x60: Allow specification of per-fs reset delays

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Custom reset rates can be specified for clocks via fs_clk_data. If
these rates are very low, then the default reset delay of 1us may
not be sufficient. Address this by allowing custom reset delays to
be specified on a per-footswitch bases.

Change-Id: Id9b9377d79436a7fe5007a8f37216a456d66ce1a
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
This commit is contained in:
Matt Wagantall
2013-04-01 15:22:47 -07:00
committed by Iliyan Malchev
parent 547218fc14
commit 667dd0a4f3
2 changed files with 13 additions and 9 deletions
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19
arch/arm/mach-msm/footswitch-8x60.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -52,7 +52,7 @@
#define GFS_DELAY_CNT 31
#define RESET_DELAY_US 1
#define DEFAULT_RESET_DELAY_US 1
/* Clock rate to use if one has not previously been set. */
#define DEFAULT_RATE 27000000
#define MAX_CLKS 10
@@ -72,6 +72,7 @@ struct footswitch {
bool is_claimed;
struct fs_clk_data *clk_data;
struct clk *core_clk;
unsigned long reset_delay_us;
};
static int setup_clocks(struct footswitch *fs)
@@ -181,7 +182,7 @@ static int footswitch_enable(struct regulator_dev *rdev)
for (clock--; clock >= fs->clk_data; clock--)
clk_reset(clock->clk, CLK_RESET_ASSERT);
/* Wait for synchronous resets to propagate. */
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
/* Enable the power rail at the footswitch. */
regval |= ENABLE_BIT;
@@ -204,9 +205,9 @@ static int footswitch_enable(struct regulator_dev *rdev)
/* Toggle core reset again after first power-on (required for GFX3D). */
if (fs->desc.id == FS_GFX3D) {
clk_reset(fs->core_clk, CLK_RESET_ASSERT);
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
clk_reset(fs->core_clk, CLK_RESET_DEASSERT);
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
}
/* Prevent core memory from collapsing when its clock is gated. */
@@ -269,7 +270,7 @@ static int footswitch_disable(struct regulator_dev *rdev)
for (clock--; clock >= fs->clk_data; clock--)
clk_reset(clock->clk, CLK_RESET_ASSERT);
/* Wait for synchronous resets to propagate. */
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
/*
* Return clocks to their state before this function. For robustness
@@ -346,7 +347,7 @@ static int gfx2d_footswitch_enable(struct regulator_dev *rdev)
for (clock--; clock >= fs->clk_data; clock--)
clk_reset(clock->clk, CLK_RESET_ASSERT);
/* Wait for synchronous resets to propagate. */
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
/* Enable the power rail at the footswitch. */
regval |= ENABLE_BIT;
@@ -361,7 +362,7 @@ static int gfx2d_footswitch_enable(struct regulator_dev *rdev)
/* Deassert resets for all clocks in the power domain. */
for (clock = fs->clk_data; clock->clk; clock++)
clk_reset(clock->clk, CLK_RESET_DEASSERT);
udelay(RESET_DELAY_US);
udelay(fs->reset_delay_us);
/* Re-enable core clock. */
clk_prepare_enable(fs->core_clk);
@@ -504,6 +505,8 @@ static int footswitch_probe(struct platform_device *pdev)
fs->clk_data = driver_data->clks;
fs->bus_port0 = driver_data->bus_port0;
fs->bus_port1 = driver_data->bus_port1;
fs->reset_delay_us =
driver_data->reset_delay_us ? : DEFAULT_RESET_DELAY_US;
for (clock = fs->clk_data; clock->name; clock++) {
clock->clk = clk_get(&pdev->dev, clock->name);

3
arch/arm/mach-msm/footswitch.h
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2010-2012 The Linux Foundation. All rights reserved.
/* Copyright (c) 2010-2013 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@ struct fs_clk_data {
struct fs_driver_data {
int bus_port0, bus_port1;
struct fs_clk_data *clks;
unsigned long reset_delay_us;
};
#define FS_GENERIC(_drv_name, _id, _name, _dev_id, _data) \