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ibm_newemac: Fix EMAC soft reset on 460EX/GT

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This patch fixes EMAC soft reset on 460EX/GT when no external clock is
available.

Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Victor Gallardo
2008-09-18 12:41:26 +00:00
committed by David S. Miller
parent c6d6a511d7
commit 6fbc779c03
3 changed files with 27 additions and 0 deletions
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4
arch/powerpc/include/asm/dcr-regs.h
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@@ -68,6 +68,10 @@
#define SDR0_UART3 0x0123
#define SDR0_CUST0 0x4000
/* SDRs (460EX/460GT) */
#define SDR0_ETH_CFG 0x4103
#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
/*
* All those DCR register addresses are offsets from the base address
* for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is