From 825b800e91c3ec74779d5b566f5d111cabbaede2 Mon Sep 17 00:00:00 2001 From: Chandan Uddaraju Date: Fri, 3 Aug 2012 11:52:31 -0700 Subject: [PATCH] msm_fb: Increase the pixel clock range for DSI panels Increase the upper limit for the pixel clock that changed with the newer version of the DSI controller. CRs-Fixed: 380003 Change-Id: Ibbeaa478b4d12ae8f350be41f959d53a6ae6c923 Signed-off-by: Chandan Uddaraju --- drivers/video/msm/mipi_dsi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/video/msm/mipi_dsi.c b/drivers/video/msm/mipi_dsi.c index b4fb930dc54..f08a4e4af98 100644 --- a/drivers/video/msm/mipi_dsi.c +++ b/drivers/video/msm/mipi_dsi.c @@ -554,8 +554,10 @@ static int mipi_dsi_probe(struct platform_device *pdev) if (rc) goto mipi_dsi_probe_err; - if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 103300000)) + if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 223000000)) { + pr_err("%s: Pixel clock not supported\n", __func__); dsi_pclk_rate = 35000000; + } mipi->dsi_pclk_rate = dsi_pclk_rate; /*