Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6: (44 commits) [PATCH] I2C: I2C controllers go into right place on sysfs [PATCH] hwmon-vid: Add support for Intel Core and Conroe [PATCH] lm70: New hardware monitoring driver [PATCH] hwmon: Fix the Kconfig header [PATCH] i2c-i801: Merge setup function [PATCH] i2c-i801: Better pci subsystem integration [PATCH] i2c-i801: Cleanups [PATCH] i2c-i801: Remove PCI function check [PATCH] i2c-i801: Remove force_addr parameter [PATCH] i2c-i801: Fix block transaction poll loops [PATCH] scx200_acb: Documentation update [PATCH] scx200_acb: Mark scx200_acb_probe __init [PATCH] scx200_acb: Use PCI I/O resource when appropriate [PATCH] i2c: Mark block write buffers as const [PATCH] i2c-ocores: Minor cleanups [PATCH] abituguru: Fix fan detection [PATCH] abituguru: Review fixes [PATCH] abituguru: New hardware monitoring driver [PATCH] w83792d: Add missing data access locks [PATCH] w83792d: Fix setting the PWM value ...
This commit is contained in:
19
include/linux/i2c-ocores.h
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19
include/linux/i2c-ocores.h
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@@ -0,0 +1,19 @@
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/*
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* i2c-ocores.h - definitions for the i2c-ocores interface
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*
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* Peter Korsgaard <jacmet@sunsite.dk>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef _LINUX_I2C_OCORES_H
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#define _LINUX_I2C_OCORES_H
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struct ocores_i2c_platform_data {
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u32 regstep; /* distance between registers */
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u32 clock_khz; /* input clock in kHz */
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};
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#endif /* _LINUX_I2C_OCORES_H */
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@@ -97,13 +97,13 @@ extern s32 i2c_smbus_write_word_data(struct i2c_client * client,
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u8 command, u16 value);
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extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
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u8 command, u8 length,
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u8 *values);
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const u8 *values);
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/* Returns the number of read bytes */
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extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
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u8 command, u8 *values);
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extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client,
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u8 command, u8 length,
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u8 *values);
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const u8 *values);
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/*
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* A driver is capable of handling one or more physical devices present on
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50
include/linux/m41t00.h
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50
include/linux/m41t00.h
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/*
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* Definitions for the ST M41T00 family of i2c rtc chips.
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*
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* Author: Mark A. Greer <mgreer@mvista.com>
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*
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* 2005, 2006 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef _M41T00_H
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#define _M41T00_H
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#define M41T00_DRV_NAME "m41t00"
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#define M41T00_I2C_ADDR 0x68
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#define M41T00_TYPE_M41T00 0
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#define M41T00_TYPE_M41T81 81
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#define M41T00_TYPE_M41T85 85
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struct m41t00_platform_data {
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u8 type;
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u8 i2c_addr;
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u8 sqw_freq;
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};
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/* SQW output disabled, this is default value by power on */
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#define M41T00_SQW_DISABLE (0)
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#define M41T00_SQW_32KHZ (1<<4) /* 32.768 KHz */
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#define M41T00_SQW_8KHZ (2<<4) /* 8.192 KHz */
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#define M41T00_SQW_4KHZ (3<<4) /* 4.096 KHz */
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#define M41T00_SQW_2KHZ (4<<4) /* 2.048 KHz */
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#define M41T00_SQW_1KHZ (5<<4) /* 1.024 KHz */
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#define M41T00_SQW_512HZ (6<<4) /* 512 Hz */
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#define M41T00_SQW_256HZ (7<<4) /* 256 Hz */
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#define M41T00_SQW_128HZ (8<<4) /* 128 Hz */
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#define M41T00_SQW_64HZ (9<<4) /* 64 Hz */
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#define M41T00_SQW_32HZ (10<<4) /* 32 Hz */
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#define M41T00_SQW_16HZ (11<<4) /* 16 Hz */
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#define M41T00_SQW_8HZ (12<<4) /* 8 Hz */
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#define M41T00_SQW_4HZ (13<<4) /* 4 Hz */
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#define M41T00_SQW_2HZ (14<<4) /* 2 Hz */
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#define M41T00_SQW_1HZ (15<<4) /* 1 Hz */
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extern ulong m41t00_get_rtc_time(void);
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extern int m41t00_set_rtc_time(ulong nowtime);
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#endif /* _M41T00_H */
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@@ -352,8 +352,11 @@
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#define PCI_DEVICE_ID_ATI_RS480 0x5950
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/* ATI IXP Chipset */
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#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349
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#define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353
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#define PCI_DEVICE_ID_ATI_IXP300_SMBUS 0x4363
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#define PCI_DEVICE_ID_ATI_IXP300_IDE 0x4369
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#define PCI_DEVICE_ID_ATI_IXP300_SATA 0x436e
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#define PCI_DEVICE_ID_ATI_IXP400_SMBUS 0x4372
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#define PCI_DEVICE_ID_ATI_IXP400_IDE 0x4376
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#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379
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#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a
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@@ -1133,9 +1136,11 @@
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#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258
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#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259
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#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS 0x0264
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS 0x0368
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F
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