[PARISC] Clean up the cache and tlb headers
No changes in functionality. Signed-off-by: Randolph Chung <tausq@debian.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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committed by
Kyle McMartin
parent
592ac93a60
commit
d6ce8626db
@@ -2,60 +2,44 @@
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#define _PARISC_CACHEFLUSH_H
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#include <linux/mm.h>
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#include <asm/cache.h> /* for flush_user_dcache_range_asm() proto */
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/* The usual comment is "Caches aren't brain-dead on the <architecture>".
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* Unfortunately, that doesn't apply to PA-RISC. */
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/* Cache flush operations */
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/* Internal implementation */
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void flush_data_cache_local(void *); /* flushes local data-cache only */
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void flush_instruction_cache_local(void *); /* flushes local code-cache only */
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#ifdef CONFIG_SMP
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#define flush_cache_mm(mm) flush_cache_all()
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void flush_data_cache(void); /* flushes data-cache only (all processors) */
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void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
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#else
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#define flush_cache_mm(mm) flush_cache_all_local()
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#define flush_data_cache() flush_data_cache_local(NULL)
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#define flush_instruction_cache() flush_instruction_cache_local(NULL)
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#endif
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#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
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void flush_user_icache_range_asm(unsigned long, unsigned long);
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void flush_kernel_icache_range_asm(unsigned long, unsigned long);
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void flush_user_dcache_range_asm(unsigned long, unsigned long);
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void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
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void flush_kernel_dcache_page_asm(void *);
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void flush_kernel_icache_page(void *);
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void flush_user_dcache_page(unsigned long);
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void flush_user_icache_page(unsigned long);
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/* Cache flush operations */
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void flush_cache_all_local(void);
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void flush_cache_all(void);
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void flush_cache_mm(struct mm_struct *mm);
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#define flush_kernel_dcache_range(start,size) \
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flush_kernel_dcache_range_asm((start), (start)+(size));
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extern void flush_cache_all_local(void);
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static inline void cacheflush_h_tmp_function(void *dummy)
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{
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flush_cache_all_local();
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}
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static inline void flush_cache_all(void)
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{
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on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
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}
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#define flush_cache_vmap(start, end) flush_cache_all()
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#define flush_cache_vunmap(start, end) flush_cache_all()
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extern int parisc_cache_flush_threshold;
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void parisc_setup_cache_timing(void);
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static inline void
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flush_user_dcache_range(unsigned long start, unsigned long end)
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{
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if ((end - start) < parisc_cache_flush_threshold)
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flush_user_dcache_range_asm(start,end);
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else
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flush_data_cache();
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}
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static inline void
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flush_user_icache_range(unsigned long start, unsigned long end)
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{
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if ((end - start) < parisc_cache_flush_threshold)
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flush_user_icache_range_asm(start,end);
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else
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flush_instruction_cache();
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}
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extern void flush_dcache_page(struct page *page);
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#define flush_dcache_mmap_lock(mapping) \
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@@ -63,9 +47,15 @@ extern void flush_dcache_page(struct page *page);
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#define flush_dcache_mmap_unlock(mapping) \
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write_unlock_irq(&(mapping)->tree_lock)
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#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page); flush_kernel_icache_page(page_address(page)); } while (0)
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#define flush_icache_page(vma,page) do { \
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flush_kernel_dcache_page(page); \
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flush_kernel_icache_page(page_address(page)); \
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} while (0)
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#define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0)
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#define flush_icache_range(s,e) do { \
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flush_kernel_dcache_range_asm(s,e); \
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flush_kernel_icache_range_asm(s,e); \
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} while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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@@ -80,118 +70,17 @@ do { \
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memcpy(dst, src, len); \
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} while (0)
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static inline void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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int sr3;
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if (!vma->vm_mm->context) {
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BUG();
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return;
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}
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sr3 = mfsp(3);
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if (vma->vm_mm->context == sr3) {
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flush_user_dcache_range(start,end);
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flush_user_icache_range(start,end);
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} else {
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flush_cache_all();
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}
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}
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/* Simple function to work out if we have an existing address translation
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* for a user space vma. */
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static inline int translation_exists(struct vm_area_struct *vma,
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unsigned long addr, unsigned long pfn)
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{
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pgd_t *pgd = pgd_offset(vma->vm_mm, addr);
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pmd_t *pmd;
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pte_t pte;
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if(pgd_none(*pgd))
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return 0;
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pmd = pmd_offset(pgd, addr);
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if(pmd_none(*pmd) || pmd_bad(*pmd))
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return 0;
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/* We cannot take the pte lock here: flush_cache_page is usually
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* called with pte lock already held. Whereas flush_dcache_page
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* takes flush_dcache_mmap_lock, which is lower in the hierarchy:
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* the vma itself is secure, but the pte might come or go racily.
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*/
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pte = *pte_offset_map(pmd, addr);
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/* But pte_unmap() does nothing on this architecture */
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/* Filter out coincidental file entries and swap entries */
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if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT)))
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return 0;
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return pte_pfn(pte) == pfn;
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}
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/* Private function to flush a page from the cache of a non-current
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* process. cr25 contains the Page Directory of the current user
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* process; we're going to hijack both it and the user space %sr3 to
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* temporarily make the non-current process current. We have to do
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* this because cache flushing may cause a non-access tlb miss which
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* the handlers have to fill in from the pgd of the non-current
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* process. */
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static inline void
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flush_user_cache_page_non_current(struct vm_area_struct *vma,
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unsigned long vmaddr)
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{
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/* save the current process space and pgd */
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unsigned long space = mfsp(3), pgd = mfctl(25);
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/* we don't mind taking interrups since they may not
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* do anything with user space, but we can't
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* be preempted here */
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preempt_disable();
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/* make us current */
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mtctl(__pa(vma->vm_mm->pgd), 25);
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mtsp(vma->vm_mm->context, 3);
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flush_user_dcache_page(vmaddr);
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if(vma->vm_flags & VM_EXEC)
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flush_user_icache_page(vmaddr);
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/* put the old current process back */
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mtsp(space, 3);
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mtctl(pgd, 25);
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preempt_enable();
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}
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static inline void
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__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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if (likely(vma->vm_mm->context == mfsp(3))) {
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flush_user_dcache_page(vmaddr);
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if (vma->vm_flags & VM_EXEC)
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flush_user_icache_page(vmaddr);
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} else {
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flush_user_cache_page_non_current(vma, vmaddr);
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}
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}
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static inline void
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flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
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{
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BUG_ON(!vma->vm_mm->context);
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if (likely(translation_exists(vma, vmaddr, pfn)))
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__flush_cache_page(vma, vmaddr);
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}
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void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
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void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end);
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#define ARCH_HAS_FLUSH_ANON_PAGE
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static inline void
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flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
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{
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if (PageAnon(page))
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flush_user_dcache_page(vmaddr);
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}
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#define ARCH_HAS_FLUSH_ANON_PAGE
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#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
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void flush_kernel_dcache_page_addr(void *addr);
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