TononixOS/ubports_kernel_google_msm
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Perf: Re-enable counters after power collapse

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Counters need to be individually re-enabled after the CPU
comes out of power collapse. Without this the counters
will simply be set to their MAX period and starting the PMU
will have no effect.

Change-Id: I3988a45277057eb80cf580b90ce697d0e6a00c43
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
This commit is contained in:
Ashwin Chaugule
2012-08-03 16:30:08 -04:00
committed by Stephen Boyd
parent 5ec4f5b115
commit fe77161b14
2 changed files with 27 additions and 5 deletions
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11
arch/arm/include/asm/pmu.h
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@@ -108,6 +108,12 @@ struct arm_pmu {
enum arm_pmu_type type;
cpumask_t active_irqs;
const char *name;
int num_events;
atomic_t active_events;
struct mutex reserve_mutex;
u64 max_period;
struct platform_device *plat_device;
u32 from_idle;
irqreturn_t (*handle_irq)(int irq_num, void *dev);
int (*request_pmu_irq)(int irq, irq_handler_t *irq_h);
void (*free_pmu_irq)(int irq);
@@ -123,11 +129,6 @@ struct arm_pmu {
void (*stop)(void);
void (*reset)(void *);
int (*map_event)(struct perf_event *event);
int num_events;
atomic_t active_events;
struct mutex reserve_mutex;
u64 max_period;
struct platform_device *plat_device;
struct pmu_hw_events *(*get_hw_events)(void);
int (*test_set_event_constraints)(struct perf_event *event);
int (*clear_event_constraints)(struct perf_event *event);