The SMB349 charger chip allows charge batteries
with a higher current. Add this driver to be able to
control charging from kernel space and deliver charging
information to userspace.
Also add debugfs entries to show current register
settings of SMB349 charger.
Change-Id: Ic88b539304539a49ebe69517d13045cbb18091bf
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
The smb137b chip from SUMMIT is a Switch Mode charger chip capable
of charging through USB source. It can also provide VBUS when the
system is a host. The driver exposes the charger properties via
the power_supply class. It also interacts with the usb driver for
insertion/removal notifications and charge current information.
The driver also turns off charging and switches to providing VBUS
when told to do so by USB driver.
Change-Id: I0ace31b9e1c7780bc9b40d5a2572340dc97966ac
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The 8660 FFA has an external smp charger chip from Intersil. Add
the isl9519q charger driver to enable charging from this chip.
Change-Id: I2705c14858f68acc273ed63a0c1e669cb7bc63d9
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
MSM 8660 FFA has two charging paths one via an SMPS charger chip isl9519q
and other via the pmic 8058 chip's linear charger.
Write a driver which talks to the power supply framework and also decides
the optimal charging path depending on the charging cable presence and
battery capacity.
Change-Id: Id00ba526651cb8da688b48b4d1e1d1eb178c1e87
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Rename power_supply_set_charging_by to power_supply_set_online to
more accurately reflect the intent of the API.
Add power_supply_set_charge_type to enable a charger driver to set
a POWER_SUPPLY_PROP_CHARGE_TYPE. Ultimately this is handled like
a request, the receiving charger driver then can handle the request
and report the adequate POWER_SUPPLY_PROP_CHARGE_TYPE once necessary
action has been taken.
Change-Id: Idf4760c7d6c0f61a9eccc656cd469a6ac5fdc6cd
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Add two APIs, 1) set_current_limit API and 2) set_charging_by.
set_current_limit api is used for external control, such as for USB
driver to tell a charger driver the maximum current to draw.
set_charging_by is used to change the state of the charger.
Change-Id: I147eab37836b54627ca1458167eb117ba3eacd7a
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
USB BAM driver to support BAM-to-BAM
USB<->Peripheral transactions.
Change-Id: Ib49a41f5dcdccb6f6bff2492fa64ead40f18b870
Signed-off-by: Ofir Cohen <ofirc@codeaurora.org>
SSBI is the Qualcomm single-wire serial bus interface used to connect
the MSM devices to the PMIC and other devices.
Since SSBI only supports a single slave, the driver gets the name of the
slave device passed in from the board file through the master device's
platform data.
SSBI registers pretty early (postcore), so that the PMIC can come up
before the board init. This is useful if the board init requires the
use of gpios that are connected through the PMIC.
Based on a patch by Dima Zavin <dima@android.com> that can be found at:
http://android.git.kernel.org/?p=kernel/msm.git;a=commitdiff;h=eb060bac4
This patch adds PMIC Arbiter support for the MSM8660. The PMIC Arbiter
is a hardware wrapper around the SSBI 2.0 controller that is designed to
overcome concurrency issues and security limitations. A controller_type
field is added to the platform data to specify the type of the SSBI
controller (1.0, 2.0, or PMIC Arbiter).
Change-Id: Ic37e1505f0ed7cfb8c5926a4c8d1770aa43e67cc
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
This is the initial version of the Wireless ConNectivity SubSystem (WCNSS)
WLAN driver. The WCNSS is a new Hardware integrating WLAN, BT and FM
technologies that is built into new MSM chip. This version of the driver
does basic WLAN device detection, WLAN SMD channel allocation probing and
trigger the PIL to download the WCNSS SW image.
Change-Id: I054566453152e8d8d02f79693e6a51f26d047835
Acked-by: Jeff Johnson <jjohnson@qualcomm.com>
Signed-off-by: Yunsen Wang <yunsenw@codeaurora.org>
Libra SDIO Interface driver module. Adds interface functions
to interact with the SD/MMC bus driver.
Acked-by: Anuradha Chandramouli <chandram@qualcomm.com>
Signed-off-by: Yunsen Wang <yunsenw@quicinc.com>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add hooks to control the relevant Gpio pin from
the Ethernet driver. This allows the driver to drive the
GPIO line low or high during suspend and resume for
power management.
Change-Id: Idfcf547501198d155d314a30923fd4de440840a9
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
The MSM7X00A baseband makes up to 3 "virtual ethernet" channels available,
which allow ethernet packets to be exchanged with the cellular network, once
an appropriate data connection is established.
Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: San Mehat <san@android.com>
[ARM] msm_rmnet: HACK: do not count ARP packets
The android network traffic watchdog is tricked into thinking that
data traffic is working at times when it isn't, due to ARP traffic
between the apps and modem processor. Don't count ARP packets in
link statistics to avoid this problem.
[ARM] msm: rmnet: Add stat tracking for number of radio wakeups occur.
There are two paramaters that appear for all rmnet devices.
rmnet0 for example:
/sys/devices/virtual/net/rmnet0/timeout (RW)
/sys/devices/virtual/net/rmnet0/wakeups (RO)
timeout is configured by userspace for the proper network timeout values
wakeups is the number of radio wakeups that occured.
By default timeout is zero which means the stats are disabled.
MSM_RMNET_DEBUG must be set.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Track wakeups due to xmit/rcv instead of globally.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Different stat timeouts when screen is on/off.
Timeout for modem powerdown can differ when the screen is on/off.
Allow timeout to change via early suspend/resume hooks.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Lock a wakelock for half a second when receiving data.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
[ARM] msm: rmnet: Tracks total awake time when the rmnet is active.
Exports data in /sys/devices/virtual/net/rmnet0/awake_time_ms
in time expressed as ms awake.
Signed-off-by: Mike Chan <mike@android.com>
[ARM] msm: rmnet: Fix compilation issue when MSM_RMNET_DEBUG is not set.
Signed-off-by: Dima Zavin <dima@android.com>
msm_rmnet: fix to build on 2.6.32
Change-Id: Ic6a4903dd12ea83723354d00f639ae2f9375167f
msm_rmnet: ensure packet writes are atomic
Use the smd_write_atomic() function to prevent concurrent
packet writes to the transport from stepping on each other.
Signed-off-by: Brian Swetland <swetland@google.com>
Normally bad block counts for ECC stats are collected during boot time.
This can be done lazily when the ECCGETSTATS ioctl is invoked on the
partition. This can significantly decrease boot time, depending on the
size of the partition. Also rescanning on every ioctl invocation helps
in having the latest bad block count rather than depending on the count
that is collected during boot.
Change-Id: I43d7a769a1d4ef769823d0b5bbe132adb474f892
Signed-off-by: Murali Palnati <palnatim@codeaurora.org>
Currently default configuration will be active
during SMSC hub enumeration. For changing the default
configuration, requires I2C support for configuring
the configurable parameters of SMSC hub like VID,PID.
Change-Id: Ie0449b166ddaae990b9a69c3a75f8059250faf0e
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This driver is based of the TZCOM (planned to be deprecated soon).
It shares the same design as TZCOM with some re-organization and
new features added. QSEEcom (Qualcomm Secure Execution environment
Communicator) is named accordingly to be consistent with the
nomenclature used in the secure domain. The following additional
features (on top of current TZCOM) driver are implemented:
(1) Add support for multi-image loading.
The image that was loaded in TZCOM was hard-coded to "tzapps".
During a open() tzapps was loaded using pil driver call pil_get().
This severly limted the number of images that could be loaded to
one single application: named "tzapps". qseecom driver provides a
way to load any image on request. Client simply send the image
data in a specific format and this data is sent over to QSEE
(Qualcomm Secure Execution enviroment) to load accordingly.
(2) Add support for multi-client.
TZcom driver did not have provisions to support multiple clients
to interface with the single tzapp image loaded on the secure
domain. The changes added in qseecom driver allows for multiple
client to interface with a single image laoded and running in
secure domain.
(3) Add support for performance tweaking in QSEE
Added capability to send requests to QSEE to set specific clocks
for optimal crypto performance. This essentially will increase
the crypto performance on the secure domain. The crypto
functionality is used extensively by the current existing qseecom
client(s).
(4) Retain legacy support for QSEOS version 1.3.
In order for the existing applications to work with old QSEE image,
qseecom also supports the old mechanism (loading tzapp image via
pil). This was a requirement for existing products that are not
yet using the latest secure code.
Change-Id: I7cf2d62c612cb4d17b33579e66bee44c9844dfda
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
- The Trustzone Communicator driver provides interface for userspace
to communicate with TrustZone.
Change-Id: Id0dadacb9997d4a50e88f48ceb03540e1897df93
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Move the following subdevices to use the pm8xxx interface -
mpp, irq, gpio, keypad, power-key, leds, othc, vibrator,
rtc, batt-alarm, thermal, upl, nfc, pwm, xoadc, regulators,
xo-buffers, charger.
This allows usage of a common driver for modules which are same
across multiple PM8XXX PMICs. It also provides flexibility
to add/remove subdevices for multiple board configurations.
Change-Id: Id9795552fc9f4a2c920c070babfaef1f4cd6ca61
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
This driver uses the timed output framework to
support the vibrator functionality.
Change-Id: Ibd21dffb458e8eecd283e80f127ab44f84d1d6c8
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Qualcomm PM8058 chip has 8 channels of PWM, also called LPG (Light
Pulse Generator). All PWM channels can be used as simple PWM machine
or as a more advanced PWM pattern generator using programmed lookup
table. This patch supports simple PWM machine as a sub device of
pmic8058 core.
To use PWM:
1. #include <linux/pwm.h>
2. #include <linux/pmic8058-pwm.h> only when you want to do the
configuration by yourself.
3. First call
* pwm_request() -- to reserve a PWM chanel
4. Call these APIs to configure & start/stop a PWM waveform
* pwm_config(period, duty) -- to configure a PWM wave
* pwm_enable() -- to start and enable the PWM output
* pwm_disable() -- to stop and disable the PWM output
You can repeat above 3 calls for different PWM waveforms.
5. Last call
* pwm_free() -- to free the PWM channel
Signed-off-by: Willie Ruan <wruan@quicinc.com>
Low level TSIF (Transport Stream InterFace) driver
provides in-kernel API to be used by upper layer
drivers;
included also is example for upper layer driver
that uses TSIF API and implements character device.
Signed-off-by: Vladimir Kondratiev <vkondrat@qualcomm.com>
The current core assumes TABLA as the only codec driver registering.
To support single binary for multiple targets its essential that
we remove this restriction and move to a generic framework
to support multiple codec. This can be done by moving all codec
specific code to dedicated codec driver and use core driver to probe
the codec based on slimbus device id and do generic setup for the
codec. This also helps to have same boards with different flavours
of codec variants.
The WCD9XXX family of codecs share the initial codec register
mapping which holds the Slimbus device id to identify the
codec existing on the target.Core driver now registers the
codec device based on this check.
Change-Id: I4c43d5f04c20696f4f5138411460681ec7879d34
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a driver to control the battery alarm module of PMIC PM8xxx
devices. This module uses a pair of comparators to determine
when battery under and over-voltage take place. A wakeup
interrupt is triggered in these cases which can then run any
notifiers which have been registered. Also add APIs to
configure the threshold voltages and the frequency at which the
hardware checks the state of the battery voltage.
Change-Id: Id0b82f9090b29ce743b5e0faac17853c94111771
Signed-off-by: David Collins <collinsd@codeaurora.org>
The driver adds support for configuring the following parameters for
external pmic speaker amp driver
1. Gain
2. Mute/Unmute
3. Speaker enable/Disable
The above operations are supported by driver by exported apis
from kernel space.The Machine driver from ALSA would use these
to configure speaker.
Change-Id: I9817f5d5c2952ca423b84f35162a842123e4d413
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a PMIC 8XXX driver which will contain several miscellanous APIs.
The API that is needed is pm8xxx_reset_pwr_off.
Change-Id: I923d01cfd9dc3f8e760ae45d70799f80af65e88c
Signed-off-by: David Collins <collinsd@codeaurora.org>
Qualcomm PM8xxx chips, such as PM8058 and PM8921, have 8 channels of
PWM, also called LPG (Light Pulse Generator) in HW specs. All PWM
channels can be used as simple PWM machine or as a more advanced PWM
pattern generator using programmed lookup table.
This patch supports all APIs listed in <linux/pwm.h> with a small
difference. The two parameters (duty_ns and period_ns) in pwm_config()
are used as values in microseconds instead of nanoseconds. Otherwise a
32-bit integer can't fit for a range of 7 us to 300+ seconds.
Change-Id: Ic8f59e96360ea3dabef591e0b257a4ffe0796d9b
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
Add support for the irq controller in Qualcomm PM8821 pmic. The
interrupt controller provides control for MPPs configured as
interrupts in addition to other subdevice interrupts.
The PM8821 IRQ controller is simpler than Secure IRQ controller
in other PMIC4 family of chips, i.e. PM8921. Also, it does not adhere
to SSBI register layout of Secure IRQ controller. This driver follows
the SSBI register layout of PM8821 IRQ controller and supports only
PM8821 IRQ controller.
The interrupt controller also provides a way to read the real time
status of an interrupt. This real time status is the only way one
can get the input values of gpio and mpp lines.
CRs-Fixed: 366276
Change-Id: Id4b9cbf42f296c26d4f8780590389bb2265e46c0
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8038 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug.
Change-Id: I83f995cc238699100a05e82d04b45ea2a63eb667
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8018 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug
Change-Id: I5787768603cb34bd3c9486d5c7d3fcf27a781ee9
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for the Qualcomm PM8821 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, MPP, and Debug
Change-Id: Ic072e634c55925292196a3e710d2dc628cbf2780
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add #define constants to describe the revision value of a given
PMIC (e.g. 8058, 8901, or 8921).
Change-Id: I45762c785622fa1259638d33c6529b210a2f143e
Signed-off-by: David Collins <collinsd@codeaurora.org>
Until now only the BMS system was using the ccadc so there was
no need to create a separate ccadc driver.
However we can run in a configuration with BMS disabled
and clients won't be able to read battery current via ccadc.
Separate the ccadc from the bms, this change in is preparation
to add a ccadc api to read the battery current.
Change-Id: Ib96b146d91d01d196df9291eb23432cd430db4d0
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
[sboyd: Take only 8921-core parts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Instead of hard coding the flag into led driver, pass it
from board file.
While at it, re-factor the code to separate led upstream
core data with board specific data.
Change-Id: I9726f8444d422fdbebdbd5d5e0c5beb6288aa5b1
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
[sboyd: only take pm8921 part]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The reset interrupt in the pmic indicates the pmic will shutdown
the msm in few seconds - it does so by lowering the reset_n line
to the msm.
When this interrupt is triggered it is required that no more ssbi
transactions are initiated and the msm should cleanup and prepare
for the impending shutdown. There is no need to lower ps_hold in
this case as the pmic will shutdown the msm regardless.
Also since we don't want any ssbi transactions, force shutdown
nonboot cpus. This will prevent ssbi transactions to the pmic for
lower/raising nonboot cpu's voltages as they enter/exit idle states.
Change-Id: If2b392c2a0494356f17bf3b721e396da2af44dd2
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
[sboyd: take header part only]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add an mfd cell for the PMIC 8921 battery alarm into the
pm8921-core.
Change-Id: Ia856c88050aa99822e6541311f40417ec63964d4
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add an mfd cell for the PMIC 8921 thermal alarm into the pm8921-core.
Change-Id: Icd791e879b5289a4b0af374f0f08d928c6b15719
Signed-off-by: David Collins <collinsd@codeaurora.org>
The VBAT IRQ needs to be controlled by the pm8xxx-batt-alarm
battery alarm driver. Remove VBAT IRQ control from the
pm8921-charger driver.
Change-Id: I478b4b572e4c08cfcd50ba4c288f847ea549f775
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Drop charger part]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
pm8921 chip is equipped with a smart battery gauge called bms.
BMS is capable of intelligently measuring battery parameters
under various loads, the software uses these reading to
accurately determine battery capacity.
Add code to support the bms driver.
Change-Id: I5f14a82db0fda11adc0404ba58704a25fa7713af
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add a mfd cell of adc as part of the pm8921 core. It adds the
interrupts allocated for the ADC/BTM driver.
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Change-Id: I68e1f8df9e24a2512869f238cb3b2fccf09aa8de
PHY OTG comparators can be disabled for maximum power savings. PHY
can not generate ID interrupt in this case. As USB id line is routed
to PM8921 on MSM8960, depend on PM8921 for ID interrupt.
Change-Id: If375274d30235f7e950e284fabc72a4d6b5bc269
Signed-off-by: Vijayavardhan <vvreddy@codeaurora.org>
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[sboyd: only take the pm8921 part and reword subject]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add an mfd cell in the pm8921-core for a pm8xxx-misc device.
Change-Id: I0bc955c118aa427e45a4d2ce80065ca1d7c146a9
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add a pair of APIs in pm8xxx/core.h: pm8xxx_get_version which returns
an enum representing the type of the PMIC (8058, 8901, 8921, etc) and
pm8xxx_get_revision which returns the silicon revision of the PMIC
chip.
Update pm8921-core to implement this new API and remove core data
members previously used to pass revision information.
Change-Id: Ib2aaf5843e4aef9281745919908c530b85717510
Signed-off-by: David Collins <collinsd@codeaurora.org>
