The QPNP VADC driver supports the User Bank Peripheral of
the voltage ADC(VADC).
VADC is a 15 bit ADC that measures signals through the
Main analog multiplexer (AMUX) and PREMUX. The driver
arbitrates the request to issue ADC read requests.
VADC driver includes support for the conversion sequencer.
The conversion sequencer is a HW triggered signal to start
ADC measurement on trigger events for PA ON,
camera flash and TX threshold.
The AMUX supports external pull-ups simultaneously. Clients
can select the appropriate AMUX input channel to measure the
ADC for the intended pull up configuration.
Change-Id: I8886968ccec54ad03334b113b4516d4d200e0da8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Add the qpnp-pwm driver to support LPG/PWM devices in Qualcomm
plug-and-play (QPNP) PMIC chips. QPNP chips make use of
Qualcomm's SPMI register convention. LPG module provides a superset
of functionality provided by PWM device such as user defined pattern
generation, driving multiple PWM channels etc.
Change-Id: I29a22c6e655612d93cac10e6eea76383d37775e2
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add mpp support to the qpnp-pin driver. MPP support allows for
additional devices to be specified in the Device Tree topology.
This support is implemented in the same driver as the GPIO
support since the address map is very close between them.
The addition of this support does not change the existing gpio
support.
Default MPP configuration can be specified in the Device Tree
using the three new bindings for mpp. Any attribute not specified
in the Device Tree will assume its default configuration.
It's also possible to configure an MPP at runtime using the
existing qpnp_pin_config() API. If a given configuration feature
is not supported by the underlying hardware pin, then that
particular request is silently dropped with no error. This allows
for gpio users to continue specifying only a subset of the full
qpnp_pin_cfg structure.
Change-Id: I2b72768647de2a371edfa05c52fc1ed776c215c0
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
qpnp-gpio manages gpio_chip queries based on the slave
ID. This has a limitation in that it restricts the number of
gpio_chips per slave ID to one. However, some PMICs have both MPP
and GPIO on the same slave, and thus the slave ID is not a
meaningful unit to search for.
Instead, make use of the 'label' binding to give the
primary dev-container node a name. This name will serve as the
gpio_chip label, which can be used in lookups.
Change-Id: Ic20caeb4622d73449a983992275446c733ddd89a
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since QPNP PMICs also include support for MPP, and since we
intend to support MPPs in the same code base, it's not
appropriate to limit this the scope of this driver to 'gpio'.
Change the driver name to 'pin' since it more accurately
describes the potential for this driver.
Also update the Device Tree include files for the name changes.
Remove a superflous 'gpio-pin' definition in the msmcopper
specific include file, since such configuration shall never
change. This binding should be defined in the PMIC specific
include only.
Change-Id: Id1d6407039908e3cf44dfc19af71f0cdc7aff8e6
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
It turns out that the only use cases for the qpnp library use
the existing spmi data structures. As such, there's really
no justification for having the library not be called 'spmi'.
There is nothing Qualcomm specific about this code.
Also cleanup some inconsistencies in the Kernel Doc comments
while we're here.
Change-Id: I1c73c88be740b6f5d38ba2de62de1737981b30fa
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
