Remove unnecessary, periodic print of cpu alive mask
as part of the petting logic.
Change-Id: I366f5107670b5d57742e168ac1f198acc68ba98c
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
Create new MDSS device node file to handle display specific
device nodes.
Change-Id: I04b4ee368b4fb4c532b467a19725c0db3f906bff
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Add new driver to support AC3/EAC3 playback.
Change-Id: I217d354d80ce1848e1c552416045a31b54a4a994
Signed-off-by: Chaithanya Krishna Bacharaju <chaithan@codeaurora.org>
- Add lowlatency pcm driver for Playback and Recording.
- Add support in target board files
- Add Recording Path to Multimedia5 FE DAI
- Add support in routing, platform, machine drivers
- Add low latency interfaces support in ASM and ADM drivers.
Change-Id: I1beb11db9010534e5aa91179ac6040a41622185d
Signed-off-by: Jayasena Sangaraboina <jsanga@codeaurora.org>
This function is not defined if native ARM timers are used,
leading to compilation errors in shared restart core.
Change-Id: Idbb393f9e5f884d31088be211a5456c1d76b5d02
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
A static mapping is needed for PS_HOLD for increased
robustness of the restart code, especially during a kernel
panic.
Change-Id: I616d1a27024120a4c53d8dbc524c4c38349dc704
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
CPR (Core Power Reduction) is a new technology to reduce
the power consumption of SOC using sensors inside the SOC.
Based on the feedback by the CPR controller, we can adjust
the voltage requirement for the SOC.
Add initial driver support for CPR.
Change-Id: I4b59438deb2635c45e45c5efe850c050c14a9165
Signed-off-by: Pankaj Kumar <pakuma@codeaurora.org>
Signed-off-by: Sravan Kumar Ambapuram <asravan@codeaurora.org>
Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
Genlock is needed for synchronization of graphics buffers.
Change-Id: I00a9b54055dc89f6b34c60d543b7ec4e096a8fa7
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Calling RCU functions from within the RCU quiescent state is
illegal and probably a bug. The idlestats code uses an atomic
notifier called from msm_cpuidle_enter() and that atomic notifier
takes an rcu read lock. We could fix this with a raw notifier,
but this code is unused so let's just remove the code entirely.
Change-Id: I319f0eabb56a8721c19a3b2b4bc9a7f416c88384
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add ADSP loader driver to bring ADSP out of reset on demand.
The MSM platforms that use APRv2 driver requires separate driver to
bring ADSP out of reset.
Change-Id: I7d64b0336fac76e71078a3bec0795007ee989643
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
The MSM platforms that turn off LPASS core by default have to bring up
LPASS core prior to talk with it.
Current implementation is during bootup, before the slimbus slave device
is up, the slimbus master on apps would try to configure the slimbus
hardware.
Add APRv2 driver to let adsp loader to bring up LPASS core on and make
slimbus driver to configure hardware after bringing up LPASS core.
Change-Id: I9c45e229e6e4c5c142d8a327509d66d9662b52d4
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
This patch removes the need for the offset parameter in dma bounce
functions. This is required to let dma-mapping framework on ARM
architecture to use common, generic dma_map_ops based dma-mapping
helpers.
Background and more detailed explaination:
dma_*_range_* functions are available from the early days of the dma
mapping api. They are the correct way of doing a partial syncs on the
buffer (usually used by the network device drivers). This patch changes
only the internal implementation of the dma bounce functions to let
them tunnel through dma_map_ops structure. The driver api stays
unchanged, so driver are obliged to call dma_*_range_* functions to
keep code clean and easy to understand.
The only drawback from this patch is reduced detection of the dma api
abuse. Let us consider the following code:
dma_addr = dma_map_single(dev, ptr, 64, DMA_TO_DEVICE);
dma_sync_single_range_for_cpu(dev, dma_addr+16, 0, 32, DMA_TO_DEVICE);
Without the patch such code fails, because dma bounce code is unable
to find the bounce buffer for the given dma_address. After the patch
the above sync call will be equivalent to:
dma_sync_single_range_for_cpu(dev, dma_addr, 16, 32, DMA_TO_DEVICE);
which succeeds.
I don't consider this as a real problem, because DMA API abuse should be
caught by debug_dma_* function family. This patch lets us to simplify
the internal low-level implementation without chaning the driver visible
API.
Change-Id: I9a847e30f345bf5e69fded1747ff79057750fb66
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
It was observed that while charging the reported soc sometimes reaches
100% before end of charging happens. At other times it does not reach
100% at end of charge and a abrupt jump to 100% soc happens.
Fix this by linearly increasing soc based on battery charge current
after constant voltage phase is reached. Constant voltage phase is
reached when battery voltage reaches the max value.
Also once constant voltage phase is reached and the voltage or charge
current decreases keep reporting the earlier soc. This could be because
of a transient system load.
Change-Id: I14c2f42d7897041db038ce85ce1124cf1ef261af
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
commit 7dbaa46678
(ARM: 7169/1: topdown mmap support) allocates mmap addresses from
the top addresses instead of the bottom. Unfortunately, some
userspace components are broken and do checks such as the following:
void* addr = mmap(...);
// Top bit is now the sign bit...
int test = (int)addr;
if (test < 0) {
//failure
}
Which means that any address greater than 0x80000000 will be marked
as a failure. Until we verify all userspace components are fixed,
revert this change.
Change-Id: I2eacbfb4f7b8fc9bf5704ca90d31c409819d7fbe
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Some USB cores have a separate IRQ line for issuing ASYNC
interrupts in LPM. This interrupt needs to be enabled only
when hardware is put in low power state.
Change-Id: Ie7de237ccbaa90294b20d3fce594ec280cb1641a
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
The RESIN bark interrupt is used for the reporting a key event.
Provide the RESIN reset configuration.
Change-Id: I5bb403bcb92b0d082e5f0382a13eb70763e69db9
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The PON device supports reset and standard-key based configurations.
Change-Id: I23f538fff32054217ed6c79d199aa0eb86f9a94d
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Manage the OCMEM core and branch clocks and keep them
on only when required to minimize the power impact.
Change-Id: I33339b317c1ec76af27bae56c552cb50fef3da0c
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Camera is facing axi overflow issues for full size
modes due to unavailability of AXI bus for VFE. Update
camera driver to send AXI allocate request before starting
the camera.
Change-Id: I2b3249cd85ecf552a042cd690853eb6f4d4b346d
CRs-Fixed: 383532
Signed-off-by: Suresh Vankadara <svankada@codeaurora.org>
The GPU MPU workaround requires the OCMEM core clock.
So refactor the workaround as a stub that can be used
with clock management support.
Change-Id: I096cdf2bf61674795befb1fbb75d5ec3faa5ed23
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The OCMEM driver needs to request frequencies for the OCMEM core.
Add a voter clock for this driver.
Change-Id: I77a2fda10af3538d6e7b9b71fcd8d1aa5fa489b7
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The reset bit inside the PMU may not be accessible if RIVA is in
power collapse. Therefore, don't assert the cCPU reset because
Linux may hang trying to write the PMU register. Instead, just
assert the toplevel reset that resets the entire RIVA subsystem.
Change-Id: I1f1094bc7974b3181b18c2246db5fb5a6c4ed812
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for 3 keys connected on PM8941 GPIOs and specify the
required GPIO configuration for these keys.
The supported keys are -
camera snapshot - PM8941 GPIO 3
camera focus - PM8941 GPIO 4
volume up - PM8941 GPIO 5
Change-Id: Icdc6f31fa5055c7e9b86a541e618cd421a0dcd2a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The "adjust_soc" algorithm where we change the open circuit voltage
(ocv) in steps so that the state of charge (soc) starts approaching
the estimated soc, causes nonlinearity in the soc curves if an incorrect
resistance value is fed to the algorithm.
As battery ages and temperature changes, it is hard to estimate the
exact battery resistance.
So to fix the nonlinearity, limit the amount by which the ocv is
changed. Make it proportional to the current, i.e. change ocv by
small amounts in light load and let it change by proportionally
large amounts in heavy load situations.
Also, make the point where the soc is adjusted configurable via platform
data instead of forcing it to 25%.
Change-Id: Idc141e6bf3172dab278afe1900f5a1f9cdd624dd
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
During chip level restart due to SSR; the crash shutdown routine of
individual subsystem are called. These routines only set
APPS_SMSM_RESET bit; and it doesn't wait for the subsystem to finish
it's error fatal routine and acknowledge it. So the Apps may reset
the msm before the subsystem finishes it's error fatal routines.
So add a 3 second delay in WCNSS crash shutdown routine; which is more
than double the time required for WCNSS to finish the error fatal
routines.
Change-Id: I1268679019b3478bb397f9104d6a2b8dac1a7fd6
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
Instead of always sleeping for 950 to 1050
microseconds between subsequent reads of the
BAM RX pipe, allow the driver to pick an
interval based on how full the BAM pipe is.
Using this technique allows the CPU to stay
in an idle state longer than with just 1ms
sleeps without compromising performance.
Change-Id: I996cd3a9da912a0acc5552566a093d3904cec4e7
Signed-off-by: Anurag Singh <anursing@codeaurora.org>
Initialize the Krait headswitches when bringing secondary
CPUs out of reset.
Change-Id: I80ab07d91d5b4d5928844e361717f28208ab9aa2
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Create a function to be called very early (before the krait-regulator
driver probes) to switch a cpu in BHS mode. Since we have not yet
probed yet, use the base address passed in to do the necessary writes.
Change-Id: I1cb1659f1e31e52b9d209427887230ee922aef80
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Currently mdp clk and bw requests are predefined in a 4-entry table
passed from the board file, and the logic to decide which level to use
is mainly based on source resolution. This patch is intended to
address several issues with this approach.
One major issue is clk and bandwidth depends on seperate things, and
need to be considered seperately. e.g. with mdp composition of
multiple pipes, bw request may be high but clk requirement may still
be low. The current approach that binds these two things together
causes inefficiency of power.
Another major issue is that there is no logic to calculate mdp clk
requirement of a single pipe based upon panel clk and downscale
parameters. Further the worst case of mdp clk should be determined by
all pipe usage. Without proper logic, many underrun have been
experienced, and blt mode may not be enalbed properly.
Also mdp_clk or blt mode update must be on right timing especially
between these two pathes: overlay play and pan display. In the
situations of performance from high to low or from low to high clk and
blt must be handled properly to avoid underruns.
In a summary, to support many different panels and targets and
complicated mdp pipe usage(mdp composition), mdp driver related to clk
and bw needs to be implemented differently. This patch is to seperate
clk and bw, and maily to deal with mdp clk and blt. Later increasing
granuity of bw will be added.
Change-Id: I678fbf86d6997ed7b602ce81cf2e0fff6164d129
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Before "msm: SSR: Pull struct restart_wq_data into struct
subsys_device" we would allocate a work struct for every instance
of a subsystem_restart() call. After that change, we only
allocate one instance of the work during intialization and we
serialize calls to queue_work() with a restarting flag in the
subsys_device structure. This has the unfortunate side effect of
silently ignoring a subsystem_restart() call made while a
subsystem is in the process of restarting (i.e. hasn't reached
the end of subsystem_restart_wq_func().
Add a refcount around the wake lock so that the system stays out
of suspend for as long as any restart work item is being processed.
Then queue the work unconditionally so that the work queue
function can determine that a subsystem restart is happening
while the subsystem is powering up.
Change-Id: Ide5627a29a0df7c1c102cf508ce577ce4f751140
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Packet polling is intended to be used with interrupts disabled, however in
multicore targets, interrupts may not be disabled on all cores. Therefore
packet polling must lock on shared resources to ensure cores with
interrupts enabled do not stomp on polling operations.
Change-Id: I2faa1024024a46ef7c55224f8e9c5e548d07c5e4
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Since MSM no longer uses PMEM, the variables, macros, and kernel
config (CONFIG_KERNEL_PMEM_EBI_REGION) relating to PMEM should be
renamed to something more generic.
Change-Id: I4ca909098c96317853d4f040850b63f37db4811e
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Contains the platform data needed to run the TSPP driver on 8064.
For more details on the TSPP peripheral, please read:
kernel/Documentation/arm/msm/tspp.txt
Change-Id: Icaa3cca0e951bcd79cc7ed4efe456b38fa586c8d
Signed-off-by: Joel Nider <jnider@codeaurora.org>
When a strong battery is removed, it was seen that the battery voltage
lines on the phone take about five to six seconds to go below 2.1volts
where the pmic resets all the battery backed registers.
If a new battery is plugged in within this time the driver will force
the shutdown soc on this battery which is incorrect.
Compare the shutdown soc with the calculated soc and if they are
different than a configurable limit, simply discard the shutdown soc
and use the calculated soc.
Change-Id: I02e7c78eb5e9df0127ce7e78b0bd9792a8141039
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The dynamic UUC algorithm changes the UUC as load, state of charge and
temperature changes. This uncontrolled behaviour causes unacceptable
jumps in state of charge numbers.
Replace the dynamic UUC algorithm with a simple average current based
UUC. The average current is calculated by remembering the load for last
few (16) samples. Also to maintain a reasonable UUC while charging, a
load of 300mA is assumed.
Note that the first time UUC is calculated we don't have load samples
and in that case the instantaneous current is used.
Since we now don't change the UUC with respect to max possible load
(itest), the usage of this value is removed. Also instead of failure
voltage we introduce cutoff voltage which represents the loaded voltage
by which the battery should be reported 0%.
Change-Id: Ia640164ee2c9690537308d4e840953824ba15b58
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
"#gpio-cells" property somehow ended up being defined
twice in the device node for gpio. Remove it
Change-Id: I555a2d23c2f11c8bb28c8797b9e71a48cb066a49
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
This reverts commit ecfd56aaca9e1ed20e6eae3322c365f9d8e5cc0c.
krait-regulator is now working, so it's safe to switch over.
Change-Id: I6f52eb4b543e2f8da879bf0dc32f9237cbd318a6
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Currently we enable the timer and unmask the interrupt
before setting the TVAL.
(in commit 9c642ecd6b71bb068c8a931285dc1dce043b137c)
This could cause a regression by opening a window
where TVAL can be negative (from a previous timer trigger)
and the interrupt unmasked, which would lead to an
immediate trigger, before TVAL is updated with the new value.
We need to set the TVAL after unmasking the interrupt, but
before enabling the timer.
Change-Id: I4989834f5dd50aa72e4e97f9ab15b82931bfdd1c
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Since OCMEM zones can vary based on the target
add an initialization flag for each zone.
Also restrict each client to only operate on
active zones.
Change-Id: Iccac64fea277f833034ddfe71cce084060cfa16d
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The current default min voltage value of 0.5V is inconsistent with
the PMIC default for 8841_s5 of 0.9V. This discrepancy causes
krait-regulator to incorrectly set kraits to LDO mode instead of
headswitch, despite the default hardware voltage being too high to
support LDO mode.
The bootstrap procedure is guaranteed to never to change 8841_s5
to a different voltage, so it's safe and reasonable to assume a
default value instead of reading 8841_s5's real-time value on
probe().
Change-Id: I28a222574d47c4961ebc2dee9c9f40d687cc4d55
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Venus Core accesses into OCMEM via OCMEMNOC use relative
addressing mode instead of absolute addressing. Update the
OCMEM model to reflect this behavior.
Change-Id: I2c9bd63f350511720a894aefc7e044e1adf3047f
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
The NoCs not owned by apps are initialized by bootloaders.
Do not touch such remote NoC registers to avoid unclocked
register accesses.
Change-Id: I8e5d36c4967daf606fdad36e2705d4daec25f060
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
