This is expected to prevent missing wireless charger state.
The bms needs to know if anything is connected to the wireless charging.
Change-Id: Ie97130cc515d19ab17b67267d9aca7588c1fff72
The battery temperature should be controlled for safty.
So this patch indroduce battery temperature control.
Change-Id: Ia00e7ce5bf697591be2da94f9a7c2960738642d5
We need to tune the board specific adcmap parameters
So need functions to set specific parameters.
void pm8xxx_set_adcmap_btm_threshold(void *pts, int size)
void pm8xxx_set_adcmap_pa_therm(void *pts, int size)
void pm8xxx_set_adcmap_ntcg_104ef_104fb(void *pts, int size)
Change-Id: Ie78c11f5fb998ecc456defa3c8e3e7a3e0b9b45f
An earlier commit(ec5b2f)increased the number of reserved fields
in the kernel standard fb.h header changing the struct size.
This caused issues with userland applications using the corresponding
bionic header. This patch revert the earlier increas in size
and makes corresponding adjustments to the reserved field usage.
A follow up patch will remove usage of reserved fields entirely.
During UVLO events the charger hardware may lock up
if it is in hardware clock switching mode.
To fix this add a battery alarm with a lower threshold
that disables hardware clock switching.
When the system is awake the resume callback ensures
that the charger is running off of the 19.2 MhZ clock
which does not allow the charger to lock up. Therefore
if the battery alarm wakes up the device before hitting
UVLO the charger hardware will not be in hardware clock
switching mode.
CRs-Fixed: 374607
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
Change-Id: I1bb20b2e7ff1a11f032b12b4abd4804ed130fe4a
To avoid dispalying garbage during lcd on/off, the turning on
lcd should be done before backlight on and turning off backlight
should be finished before lcd off. But current implementation
doesn't guarantee these on/off sequence. This patch ensure the
sequence of lcd and backligth on/off.
Change-Id: I11771d395c1a68b4e70b63639f50c773a665b441
Signed-off-by: Iliyan Malchev <malchev@google.com>
Conflicts:
drivers/video/msm/msm_fb.c
CABC(Content Adaptive Backlight Control) is supported by
mako lcd panel. So this patch enables it to reduce power
consumption.
Change-Id: I433281bc5fe4e638cfeba1beb9cb61e1775f3896
Use ARRAYED_TOUCH_FW_BIN feature to support both new(PLG137/0.9T)
and old(TM2000/0.55T) panels with one binary.
Firmware Verison: New - E003, Old - E059 (no change)
Change-Id: Ia96eba137f8a02054eb8067d47dc887edffb9970
- Let the low level driver pass tool type and use it
(Synaptics: PEN when major = 0, minor = 0, Other: FINGER)
- Split touch major and minor value to choose
circle vs. ellipse from platform datai
(Currently defined to support circle)
Change-Id: Ibd79efb5d88843174c45147a4c7ea170632c3fdb
The ghost function sets FORCE_FAST_RELAXATION and
FORCE_UPDATE registers, which cause touch abnormal function
after resume.
Also code clean up for register map initialization.
Change-Id: Ib442d4d7a2e995048fba902fe852a3851fdbf418
- not applied to hard key function, so removed hard key stuff
- jitter and accuracy filter function also changed but not used at the moment
- corrected some wrong error handling in touch_probe and synaptics_ts_probe
Change-Id: I1af3032612cdedbfac9da9c5df17eeb861344226
This driver supports the Qualcomm PNP clkdiv peripheral. It
allowed for configuring divide factors for various clock outputs
on the PMIC. The source clock is CXO.
The driver allows for configuration of the clkdiv device through
Device Tree. Some optional parameters may be specified instead at
runtime with the qpnp_clkdiv_config() API.
Change-Id: I393ed0e4389fb3c1dfe0bcdb40944102d2e09894
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add new driver to support AC3/EAC3 playback.
Change-Id: I217d354d80ce1848e1c552416045a31b54a4a994
Signed-off-by: Chaithanya Krishna Bacharaju <chaithan@codeaurora.org>
It was observed that while charging the reported soc sometimes reaches
100% before end of charging happens. At other times it does not reach
100% at end of charge and a abrupt jump to 100% soc happens.
Fix this by linearly increasing soc based on battery charge current
after constant voltage phase is reached. Constant voltage phase is
reached when battery voltage reaches the max value.
Also once constant voltage phase is reached and the voltage or charge
current decreases keep reporting the earlier soc. This could be because
of a transient system load.
Change-Id: I14c2f42d7897041db038ce85ce1124cf1ef261af
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Some USB cores have a separate IRQ line for issuing ASYNC
interrupts in LPM. This interrupt needs to be enabled only
when hardware is put in low power state.
Change-Id: Ie7de237ccbaa90294b20d3fce594ec280cb1641a
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
The "adjust_soc" algorithm where we change the open circuit voltage
(ocv) in steps so that the state of charge (soc) starts approaching
the estimated soc, causes nonlinearity in the soc curves if an incorrect
resistance value is fed to the algorithm.
As battery ages and temperature changes, it is hard to estimate the
exact battery resistance.
So to fix the nonlinearity, limit the amount by which the ocv is
changed. Make it proportional to the current, i.e. change ocv by
small amounts in light load and let it change by proportionally
large amounts in heavy load situations.
Also, make the point where the soc is adjusted configurable via platform
data instead of forcing it to 25%.
Change-Id: Idc141e6bf3172dab278afe1900f5a1f9cdd624dd
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Few platforms do not want to use the shutdown soc. Provide a option to
selectively disable it.
Change-Id: Ie57d474f4e81e4ce2e7e7a4a92cda20d4c8dd184
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Create a function to be called very early (before the krait-regulator
driver probes) to switch a cpu in BHS mode. Since we have not yet
probed yet, use the base address passed in to do the necessary writes.
Change-Id: I1cb1659f1e31e52b9d209427887230ee922aef80
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When a strong battery is removed, it was seen that the battery voltage
lines on the phone take about five to six seconds to go below 2.1volts
where the pmic resets all the battery backed registers.
If a new battery is plugged in within this time the driver will force
the shutdown soc on this battery which is incorrect.
Compare the shutdown soc with the calculated soc and if they are
different than a configurable limit, simply discard the shutdown soc
and use the calculated soc.
Change-Id: I02e7c78eb5e9df0127ce7e78b0bd9792a8141039
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The dynamic UUC algorithm changes the UUC as load, state of charge and
temperature changes. This uncontrolled behaviour causes unacceptable
jumps in state of charge numbers.
Replace the dynamic UUC algorithm with a simple average current based
UUC. The average current is calculated by remembering the load for last
few (16) samples. Also to maintain a reasonable UUC while charging, a
load of 300mA is assumed.
Note that the first time UUC is calculated we don't have load samples
and in that case the instantaneous current is used.
Since we now don't change the UUC with respect to max possible load
(itest), the usage of this value is removed. Also instead of failure
voltage we introduce cutoff voltage which represents the loaded voltage
by which the battery should be reported 0%.
Change-Id: Ia640164ee2c9690537308d4e840953824ba15b58
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
If the battery fet is open, the current sourced or sinked from the
battery is very low. There is a high chance that an open circuit
voltage(OCV) happens. Putting the BMS in override mode resets the timer
whose expiry causes an OCV.
Avoid putting the BMS in override mode if battery fet is open.
Change-Id: Idc463bcc55b51cf188cc8ee440a66f763654f174
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
There is a corner case in the tty driver where the value of
tty->receive_room is not being updated before writing data to
the line discipline. When this happens, data is lost because
of failure to re-submit any remaining data to the ldisc.
This fix is dependent on a new tty flag that is set only when
the tty driver is used for efs sync betweem the mdm modem and
the applications processor.
CRs-Fixed: 358868
Change-Id: I0ba02980504b4d8187b8c83111c2c883d194efa2
Signed-off-by: Joel King <joelking@codeaurora.org>
Adds an accessor function, irq_is_per_cpu(), for the flag IRQ_PER_CPU.
This is useful if you have an IRQ that is per-cpu in some hardware
implementations, and not in others (example: ARM PMU Interrupts), and
you want to handle both cases.
Change-Id: Ic176ee5b8f9a830c1db35cb939ec659a4cf3f938
Signed-off-by: Chris Smith <chris.smith@st.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
DIAG SSID ranges are updated on modem side. Hence same
update is needed on application processor side. This
change updates the same.
We plan to implenent an algorithm which will remove the
need for manual updates.
Change-Id: I573b75fe0b88bad6f0b2fd5d1b12eb4530067912
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Dup ftrace event traffic (including writes to trace_marker file from
userspace) to STM. Also dup printk traffic to STM. This allows Linux
tracing and log data to be correlated with other data transported over
STM.
Change-Id: Ieb0b856447f7667eb0005a6a884211dc46f50217
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Provide CoreSight abort debug api to stop the active trace sink
from any context. This is a best effort api that can be used to
abruptly stop and disable the current trace sink from anywhere
in the kernel to avoid tracing and hence polluting the trace data
after the point of interest has been executed.
Change-Id: I34c528d9febec4265088a7267dbcf0e7a1f87fcf
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Support for reading hardware data for CoreSight devices from device
tree.
Change-Id: I4d149991c89b458384465d163386084f500a4028
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Read the codec specific data from device tree instead of board file.
Change-Id: Iad382b89692903d2434b63d34c7121fe0b4b9dda
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
Allow to USB clocks to remain on only for bus suspend case, but turn
off clocks for any other case, such as cable disconnect.
CRs-Fixed: 378955
Change-Id: I4d85b645cfd231126fbc160a0c14273066ce674c
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Switch all CoreSight drivers to start using the new CoreSight core
layer code. Remove obsolete qdss code.
Change-Id: I2d4496aea0ffd918e0bfbf4b4e58ad82ea634a59
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Define device tree bindings for MSM_THERMAL driver, and implement
matching code to make the driver abide to these bindings.
Change-Id: I6ed08a09f45f8748841cf44db601f28659e49d9c
Signed-off-by: Eugene Seah <eseah@codeaurora.org>
Badger kraits have a single voltage supply coming from the pmic. This
supply is provided by multiple switching regulators operating in
ganged mode.
There is a LDO and a HS (Head Switch) per core that further control the
voltage supply to that core.
This driver manages the ganged supply by calling upon the spm driver to
set phases and voltage.
Change-Id: Idc0a0ae3242729a7e0ede5962974c09b61d8d39c
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When otg_control is set to OTG_PHY_CONTROL and PMIC interrupts are
not used for VBUS notification, a cable connection will fail to
wake up the device from VDD minimized low power mode. The MPM needs
to be configured to wake up the system when the USB_PHY_OTGSESSVLD
interrupt is triggered. As this interrupt may vary by SoC populate
it in the msm_otg_platform_data->mpm_otgsessvld_int member in the
various board files.
CRs-fixed: 376740
Change-Id: Ia54828f538c695ff6b28f5d7b2b49630a45cc673
Signed-off-by: Jack Pham <jackp@codeaurora.org>
