ubports_kernel_google_msm

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Michal Simek 0d670b2472 microblaze: Fix cache loop function for cache range

I create wrong asm code but none test shows that this part of code is wrong.
I am not convinces that were good idea to create asm optimized macros
for caches. The reason is that there is not optimization with previous code
that's why make sense to add old code and do some benchmarking which
functions are faster.

Signed-off-by: Michal Simek <monstr@monstr.eu>

2010-02-24 13:18:29 +01:00

cache.c

microblaze: Fix cache loop function for cache range

2010-02-24 13:18:29 +01:00

cpuinfo-pvr-full.c

microblaze: Checking DTS against PVR for write-back cache

2009-12-14 08:45:05 +01:00

cpuinfo-static.c

microblaze: Extend cpuinfo for support write-back caches

2009-12-14 08:44:58 +01:00

cpuinfo.c

microblaze: Add PVR for Microblaze v7.30.a