In newer SDCC v4 versions, the internal single port RAM is
replaced by dual-Port RAM which requires clock muxing after
RX transactions. To ensure clock switch is completed
successfully, the driver has to poll for TX/RX active bits
de-assertion in status register before initiating new transaction.
Change-Id: Idcd7732fa4fa490017e69d62535dbff6eb335eb6
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
7edc633613