Files
ubports_kernel_google_msm/arch/x86/kernel/cpu
Andreas Herrmann a326e948c5 x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors
L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-09-03 15:10:03 -07:00
..
2009-03-23 02:06:51 +05:30
2009-06-15 12:40:02 +02:00
2008-11-23 11:02:36 +01:00