Handle enabling/disabling the vsync interrupt and mdp clock enabling/disabling in a better way on MDP 3.03 targets. This will avoid target crashes due to unclocked register access. CRs-fixed: 388751 Change-Id: I5c4a409772464ce7d06869374dcba5ad7e335955 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org> Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>