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ubports_kernel_google_msm/include
Juergen Beisert c0db2ea4e3 MXC family: Add clock handling
Internal clock path handling for the mxc CPUs.

Changed against the original Freescale code (and against clocklib for example):
 - clock rate is always calculated whenever one ask for the current rate
   (means struct clk has no more a member called "rate"). So switching the PLL
   base frequency will propagate immediately to all other clocks that are
   depending on this frequency.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:47 +02:00
..
2008-07-05 10:02:47 +02:00
2008-06-06 11:29:12 -07:00
2008-05-12 22:57:51 +10:00
2008-05-20 00:33:44 -07:00
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2008-06-06 11:29:12 -07:00