Files
ubports_kernel_google_msm/arch/mips
Thomas Bogendoerfer c7c6b39050 [MIPS] Use correct dma flushing in dma_cache_sync()
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
..
2007-11-29 09:24:53 -08:00
2008-01-07 15:32:03 +00:00
2008-01-29 10:14:55 +00:00
2007-08-27 02:16:55 +01:00
2008-01-29 10:14:54 +00:00