This repository has been archived on 2026-03-14. You can view files and clone it, but cannot push or open issues or pull requests.
Files
ubports_kernel_google_msm/arch
Zach Brown 379b5441ae x86: align per-cpu section to configured cache bytes
This matches the fix for a bug seen on x86-64.  Test booted on old hardware
that had 32 byte cachelines to begin with.

Signed-off-by: Zach Brown <zach.brown@oracle.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2006-02-19 09:51:19 +01:00
..
2006-02-07 16:12:32 -08:00