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ubports_kernel_google_msm/arch/powerpc
Kumar Gala decbb280bb powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
If the spin table is located in the linear mapping (which can happen if
we have 4G or more of memory) we need to access the spin table via a
cacheable coherent mapping like we do on ppc32 (and do explicit cache
flush).

See the following commit for the ppc32 version of this issue:

commit d1d47ec6e6
Author: Peter Tyser <ptyser@xes-inc.com>
Date:   Fri Dec 18 16:50:37 2009 -0600

    powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-15 09:29:56 -05:00
..
2011-03-10 11:04:04 +11:00
2011-01-12 11:29:09 +02:00
2010-08-24 15:26:32 +10:00