Add support for the A15 generic timer and clocksource.
As the timer generates interrupts on a different PPI depending
on the execution mode (normal or secure), it is possible to
register two different PPIs.
Change-Id: Ibaddc7f174bc168cef579b66ab06b966878ae155
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
(cherry picked from commit f5b3b2b2a44e813fbbe1799965a8879429f59329)
Conflicts:
arch/arm/kernel/Makefile
c101c0ceea