msm: clock-8960/8660/9615: Fix pcm clock initial rate

If the pcm clock is not handed off via clock handoff the rate of
pcm is set to 0. In this case, clk_set_rate() of zero would not
program the hardware to select the external input. Therefore set
the rate of the clock to some large initial value so that
clk_set_rate(0) will work properly.

Change-Id: I2555cf2bd1984e8ede5a2b537a3a7dd60034fcf5
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Stephen Boyd
2012-06-18 18:47:03 -07:00
parent 2fa2bee596
commit 4f274ea947
3 changed files with 3 additions and 0 deletions

View File

@@ -4518,6 +4518,7 @@ static struct rcg_clk pcm_clk = {
.ops = &clk_ops_rcg,
VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(pcm_clk.c),
.rate = ULONG_MAX,
},
};

View File

@@ -3096,6 +3096,7 @@ static struct rcg_clk pcm_clk = {
.ops = &clk_ops_rcg,
VDD_DIG_FMAX_MAP1(LOW, 24580000),
CLK_INIT(pcm_clk.c),
.rate = ULONG_MAX,
},
};

View File

@@ -1269,6 +1269,7 @@ static struct rcg_clk pcm_clk = {
.ops = &clk_ops_rcg,
VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(pcm_clk.c),
.rate = ULONG_MAX,
},
};