msm: clock-8960/8660/9615: Fix pcm clock initial rate
If the pcm clock is not handed off via clock handoff the rate of pcm is set to 0. In this case, clk_set_rate() of zero would not program the hardware to select the external input. Therefore set the rate of the clock to some large initial value so that clk_set_rate(0) will work properly. Change-Id: I2555cf2bd1984e8ede5a2b537a3a7dd60034fcf5 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@@ -4518,6 +4518,7 @@ static struct rcg_clk pcm_clk = {
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.ops = &clk_ops_rcg,
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VDD_DIG_FMAX_MAP1(LOW, 24576000),
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CLK_INIT(pcm_clk.c),
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.rate = ULONG_MAX,
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},
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};
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@@ -3096,6 +3096,7 @@ static struct rcg_clk pcm_clk = {
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.ops = &clk_ops_rcg,
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VDD_DIG_FMAX_MAP1(LOW, 24580000),
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CLK_INIT(pcm_clk.c),
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.rate = ULONG_MAX,
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},
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};
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@@ -1269,6 +1269,7 @@ static struct rcg_clk pcm_clk = {
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.ops = &clk_ops_rcg,
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VDD_DIG_FMAX_MAP1(LOW, 24576000),
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CLK_INIT(pcm_clk.c),
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.rate = ULONG_MAX,
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},
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};
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