msm: clock-copper: Fixup lpass clocks to reflect updated documentation
To correctly reflect the LPASS clock hardware, do the following: 1. Remove the max_div setting in the PCM ibit clocks. There is no such divider. 2. The I2S external bit branch clocks are not sourced from the I2S RCGs. Remove these parent-child relationships. Change-Id: I849ac51ad028b4d1ce9e3d675ce64afdc99e8c75 Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
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committed by
Stephen Boyd
parent
4971d3096c
commit
680140cbb6
@@ -3998,7 +3998,6 @@ static struct branch_clk audio_core_lpaif_codec_spkr_osr_clk = {
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static struct branch_clk audio_core_lpaif_codec_spkr_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_CODEC_SPKR_EBIT_CBCR,
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.parent = &audio_core_lpaif_codec_spkr_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4035,7 +4034,6 @@ static struct branch_clk audio_core_lpaif_pri_osr_clk = {
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static struct branch_clk audio_core_lpaif_pri_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_PRI_EBIT_CBCR,
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.parent = &audio_core_lpaif_pri_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4072,7 +4070,6 @@ static struct branch_clk audio_core_lpaif_sec_osr_clk = {
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static struct branch_clk audio_core_lpaif_sec_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_SEC_EBIT_CBCR,
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.parent = &audio_core_lpaif_sec_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4109,7 +4106,6 @@ static struct branch_clk audio_core_lpaif_ter_osr_clk = {
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static struct branch_clk audio_core_lpaif_ter_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_TER_EBIT_CBCR,
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.parent = &audio_core_lpaif_ter_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4146,7 +4142,6 @@ static struct branch_clk audio_core_lpaif_quad_osr_clk = {
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static struct branch_clk audio_core_lpaif_quad_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_QUAD_EBIT_CBCR,
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.parent = &audio_core_lpaif_quad_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4171,7 +4166,6 @@ static struct branch_clk audio_core_lpaif_quad_ibit_clk = {
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static struct branch_clk audio_core_lpaif_pcm0_ebit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_PCM0_EBIT_CBCR,
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.parent = &audio_core_lpaif_pcm0_clk_src.c,
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.has_sibling = 1,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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@@ -4185,7 +4179,6 @@ static struct branch_clk audio_core_lpaif_pcm0_ibit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_PCM0_IBIT_CBCR,
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.parent = &audio_core_lpaif_pcm0_clk_src.c,
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.has_sibling = 1,
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.max_div = 16,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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.dbg_name = "audio_core_lpaif_pcm0_ibit_clk",
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@@ -4210,7 +4203,6 @@ static struct branch_clk audio_core_lpaif_pcm1_ibit_clk = {
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.cbcr_reg = AUDIO_CORE_LPAIF_PCM1_IBIT_CBCR,
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.parent = &audio_core_lpaif_pcm1_clk_src.c,
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.has_sibling = 1,
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.max_div = 16,
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.base = &virt_bases[LPASS_BASE],
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.c = {
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.dbg_name = "audio_core_lpaif_pcm1_ibit_clk",
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