arm: 1M align init, text, rodata if CONFIG_STRICT_MEMORY_RWX is set
Init code, text, rodata and data need different permissions and so they need to be on different pages. The kernel 1-to-1 mapping is constructed using 1M pages to improve TLB performance and this should not be changed (to 4K pages). Therefore ensure that each of these regions starts on a 1M boundary. Change-Id: I855b58d3deff6c34e58d1cbdef4b360c2b23ca6d Signed-off-by: Larry Bassel <lbassel@codeaurora.org> Signed-off-by: Jin Hong <jinh@codeaurora.org> (cherry picked from commit 4cfee820adbdd7514b67e59c1b87008436d984ab)
This commit is contained in:
committed by
Stephen Boyd
parent
42bc26b44c
commit
bf55a67838
@@ -8,7 +8,10 @@
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/page.h>
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#ifdef CONFIG_STRICT_MEMORY_RWX
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#include <asm/pgtable.h>
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#endif
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#define PROC_INFO \
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. = ALIGN(4); \
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VMLINUX_SYMBOL(__proc_info_begin) = .; \
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@@ -90,6 +93,7 @@ SECTIONS
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_text = .;
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HEAD_TEXT
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}
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.text : { /* Real text segment */
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_stext = .; /* Text and read-only data */
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__exception_text_start = .;
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@@ -111,6 +115,9 @@ SECTIONS
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*(.got) /* Global offset table */
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ARM_CPU_KEEP(PROC_INFO)
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}
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#ifdef CONFIG_STRICT_MEMORY_RWX
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. = ALIGN(1<<SECTION_SHIFT);
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#endif
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RO_DATA(PAGE_SIZE)
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@@ -134,7 +141,11 @@ SECTIONS
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_etext = .; /* End of text and rodata section */
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#ifndef CONFIG_XIP_KERNEL
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#ifdef CONFIG_STRICT_MEMORY_RWX
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. = ALIGN(1<<SECTION_SHIFT);
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#else
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. = ALIGN(PAGE_SIZE);
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#endif
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__init_begin = .;
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#endif
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@@ -178,6 +189,10 @@ SECTIONS
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INIT_RAM_FS
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}
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#ifndef CONFIG_XIP_KERNEL
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#ifdef CONFIG_STRICT_MEMORY_RWX
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. = ALIGN(1<<SECTION_SHIFT);
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#endif
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__init_data = .;
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.exit.data : {
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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