msm: acpuclock-krait: Disable secondary clock source gating during switches
To workaround a Krait errata on 8064, disable secondary clock source gating during the MUX switch. This errata was already worked around in msm-krait-l2-accessors.c in a different way, but that will soon be removed in favor of this and some power-collapse changes. Signed-off-by: Matt Wagantall <mattw@codeaurora.org> Change-Id: Iffe42ee7216c9b9c4a4e68ddfe80fbc03b0413b0 Signed-off-by: Neha Pandey <nehap@codeaurora.org>
This commit is contained in:
committed by
Stephen Boyd
parent
c57174ee8f
commit
d42d5cc612
@@ -43,6 +43,8 @@
|
||||
#define PRI_SRC_SEL_HFPLL 1
|
||||
#define PRI_SRC_SEL_HFPLL_DIV2 2
|
||||
|
||||
#define SECCLKAGD BIT(4)
|
||||
|
||||
static DEFINE_MUTEX(driver_lock);
|
||||
static DEFINE_SPINLOCK(l2_lock);
|
||||
|
||||
@@ -81,10 +83,20 @@ static void __cpuinit set_sec_clk_src(struct scalable *sc, u32 sec_src_sel)
|
||||
{
|
||||
u32 regval;
|
||||
|
||||
/* 8064 Errata: disable sec_src clock gating during switch. */
|
||||
regval = get_l2_indirect_reg(sc->l2cpmr_iaddr);
|
||||
regval |= SECCLKAGD;
|
||||
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
|
||||
|
||||
/* Program the MUX */
|
||||
regval &= ~(0x3 << 2);
|
||||
regval |= ((sec_src_sel & 0x3) << 2);
|
||||
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
|
||||
|
||||
/* 8064 Errata: re-enabled sec_src clock gating. */
|
||||
regval &= ~SECCLKAGD;
|
||||
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
|
||||
|
||||
/* Wait for switch to complete. */
|
||||
mb();
|
||||
udelay(1);
|
||||
|
||||
Reference in New Issue
Block a user