Refactor the inline assembly code in spinlock.h in
preparation for supporting the Krait safe WFE sequence.
Change-Id: I2db4f823c39b164e04673f44cea916e334a20c9a
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Remove the condition argument from the WFE macro in the
spinlock code so it can support a WFE fixup needed on
certain Krait CPUs.
Change-Id: I8b4f85f0e7c130dff1e14fe275fda14a43e6f3f4
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Some physical pools ids may become unsupported in future targets.
Remove target specific information from API to make it robust against
such architectural changes.
Also different platforms such as MDM, MSM might support some physical
pools but not the other, so choosing a generic name which will could be
mapped internally to different memory pools
Change-Id: I4f003662d9a2a28c17eefa5230530b8608b26c09
Signed-off-by: Harmandeep Singh <hsingh@codeaurora.org>
Rather than enabling compilation of acpuclock-krait on every Krait
target individually, use the Krait Kconfig.
Change-Id: I42fa5e7194bc96d181dcc3d3247022a53c9f90f8
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
The APIs are currently unused. They were added for the benefit of
the acpuclock-8960 driver, which needed them to ensure that CPUs
were really power-collapsed before their clocks were disabled.
The current acpuclock-krait driver solves this problem a different
way, by taking advantage of hardware features that were not
available in early (unreleased) versions of the Krait cores. Now,
instead of disabling the CPUs' clocks, a low-frequency always-on
clock source is selected and hardware clock gating is employed to
save power. With this, it is no longer necessary to wait for the
SPM to confirm the CPU has power-collapsed before acpuclock's
CPU_DEAD callback executed.
Change-Id: If93efea7c0bd4bb2943e1a1782217943eacf31a0
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Refactor the initialization code so that datastructures that must be
kept are kmemduped and the rest are discarded after the kernel has
booted with the help of __initdata markings.
For a typically-compiled all-in-one kernel containing support for
msm8960, apq8064, msm8627 and msm8930, this allows 11.5K to be moved
from the .data to the .init.data section, with less than 10% of that
retained in dynamically-allocated memory (the exact amount varies
depending on the device the kernel is booted on).
Change-Id: I505eef8f10dc0e44bab15954b797252c3c408e50
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
The HFPLL data for the CPU PLLs and the L2 PLL are the same with the
exception of the voltage data specified. The voltage data, however,
is only relevant for the L2 PLLs (since the CPU HFPLL voltage
requirements are captured as part of the CPU frequency/voltage table).
Because of this the tables can be combined.
Change-Id: Ic8c9bdcf3c3c32a62906031fe5ffbc60a8b824f4
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
By referencing L2 frequency table rows by indexes rather than pointers,
we allow for future enhancements which will allocate the L2 frequency
table at runtime.
Change-Id: Icc62962d5d7b27dbf39008bc6eff83c4ee8951c4
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Leverage the optimized code of the new acpuclock-krait driver for
8960. The newer driver is simpler and more efficient than the existing
acpuclock-8960 code, but drops support for Krait v1 processors (which
were not commercialized anyway).
Change-Id: I5cc875446f02a9f169c9997b716e0464a3a20ee1
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Migrate 8064 support from acpuclock-8960 to the newer, optimized
acpuclock-krait driver which is shared among multiple SoCs while
keeping 8064 data in its own file.
Change-Id: I0fc5e5f8ade2976b8e1727c9c560f640450f8837
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
8064v1.x hardware has a known issue where the CPU's primary and secondary
clock source muxes reset to their default states when the L2 cache is
power-collapsed. To work around this, software sets these muxes to their
default positions (QSB selected) before L2 power-collapse so that software
state remains in sync with the hardware.
Replace this workaround with an improved one that incurs less of a latency
penalty in the hotplug path (since selecting the slow QSB source may slow
down hotplug). The improved workaround targets the root of the problem,
which is that the L2CPUVRF8 CP15 register becomes corrupt when L2CPMR or
L2CPUCPMR are written to. It is this corruption that results in the
change in L2 power-collapse behaviour and the muxes getting reset.
Implement the improved workaround, which saves and restores L2CPUVRF8's
value around L2CPMR and L2CPUCPMR writes. Although the register is still
corrupt for a short period of time before the register is restored, this
is of no consequence since L2 power-collapse cannot happen at that time.
Change-Id: I3ac13f286ac903d5f974bf735ebf287d9413216b
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
For 8974 target, pil_get function uses "adsp" string as a param, for
other targets it uses "q6", for pil_get to succeed, we need to try
with both strings before we return an error.
Change-Id: Ia1e05f9ce4d9f09165bdfbd1c68cad9136d62b0f
Signed-off-by: Harmandeep Singh <hsingh@codeaurora.org>
The USB 3.0, USBHS and USB HSIC cores require asynchronous block
reset support for correct operation in certain scenarios. Support
these resets by adding BCR_REG for the relevant clocks.
Change-Id: If4f47201c485ea2060d4b795e767a1c69d34d22e
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Add GSBI8 device and its related interfaces with their configuration
i.e. clock, ADM, GPIO. GSBI8 UARTDM interface can be used for external
Bluetooth SoC.
CRs-Fixed: 375285
Change-Id: I15819862072c92d8ff6f397fdf081f1b619ec235
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
After disconnecting the phone from TV which doesn't support
underscan, and connected to TV which support underscan,
underscan is not working due to non re-initialization of
scan variables. Re-initialize the underscan variables for
every HDP events.
CRs-Fixed: 375862
Change-Id: I22b7b8785ec93f9cf226e9b646a851ffb3ceff62
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When HDMI is primary, suspend-resume is not happening.
For HDMI as primary case, early suspend and resume can be
used. This change implements early suspend and resume for
hdmi as primary case.
CRs-fixed: 381097
Change-Id: I7b83d07a8b109294f3606c60f58b760836b88685
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
SDC1 and SDC2 interfaces on copper target has dedicated
TLMM pins and SDC3, SDC4 have GPIOs muxed with other
subsystems.
Change-Id: I6f924ccb0c27e8ecde95c0a7d8beb6614c25378d
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
In case of PAN display, PAN update function would return
without allocating dtv pipe resulting in no HDMI display.
This change removes unnecessary checks and enable dtv pipe
for PAN display as well.
CRs-Fixed: 379625
Change-Id: I533392a1120a21e962fbbbf0c07a89997832406f
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
As per msm8930 HW varients, default GPU turbo clock is 400MHz used for
msm8930,msm8627 and 450MHz for msm8930aa.
CRs-Fixed: 375984
Change-Id: I0e971079ce4d2f2a9c65d6b8449ef201124536af
Signed-off-by: Sudhakara Rao Tentu <srtentu@codeaurora.org>
Only trigger SMSM callback processing for the local processor if
callbacks have been registered.
Without this fix, excessive SMSM bit toggles may overflow the SMSM
snapshot queue.
Change-Id: Ieeb3e62f50915807eae92ac0762b2af5ac8a8438
CRs-Fixed: 378402
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: Angshuman Sarkar <angshuman@codeaurora.org>
The pmic spk driver is not getting disabled due to wrong disble
logic.This results in spk driver always on.
CRs-Fixed: 376950
Change-Id: Ia1509f97ae1a3526732218492ff86063afe68137
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add device tree information for RTC device found on PM8941
PMIC chip. The device tree entry corresponds to the bindings
already defined for qpnp-rtc.
Change-Id: I80e2a7035664bd5e5ff1c76f779939ee658e853f
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
The start encryption command fails when the LE update
connection parameters request is pending.
Hence, prevent the update of LE connection parameters during the
bonding process. The update of connection parameters is
not necessary during bonding process.
CRs-fixed: 380257
Change-Id: I41cb3998fecc2297d61ec97d66ac35a0bd41ca80
Signed-off-by: Subramanian Srinivasan <subrsrin@codeaurora.org>
Volume and mute settings before voice call is started are cached
in the driver, apply the cached settings at call start.
Change-Id: Iabc1f47c46a8e986c79106545ac3ee977fbca99c
Signed-off-by: Neema Shetty <nshetty@codeaurora.org>
Userspace requires controls to set profile and level values. Hence
expose V4L2_CID_MPEG_VIDC_VIDEO_H263_PROFILE and
V4L2_CID_MPEG_VIDC_VIDEO_H263_LEVEL.
Change-Id: Id2b5d4ade8dda1a32b11820936532300b18c37ac
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
We are no longer supporting FMEM from MSMs. So, disable
FMEM from 7627a/8625
Change-Id: I557a9a851a21ff1480d76e5115b1b07acdd48483
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
These clocks are special cases, since the set_rate() functions for
their children internally call clk_enable(). This will cause
warnings to be printed if the parents are not prepared.
This is currently harmless since clk_prepare() and clk_unprepare()
do not do anything yet. Fixing it properly, however, will involve
significant refactoring and moving functionality into the prepare
APIs. Since that phase of development is not complete yet, just
disable the warnings for now.
Change-Id: I3dc8661f9fcf2a84d748f2cf49cbed3f756c44bf
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Video driver uses PIL and IOMMU to download video
firmware.Video firmware is downloaded during the
start of video session using PIL apis.
Change-Id: If285e9b6df57ecdfa379fa82b9eef542e6aa9bba
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
When a video device is registered through video_register_device,
the fh_lock and fh_list variables are already initialized. So we
dont need to explicitly initialize them during v4l2 event queue
setup. Doing this overwrites the fh_list in some cases like
mctl pp node, where each instance can have its own eventHandle but
linked to the mctl pp video node. This can cause video device list
corruption in some usecases like HDR. Remove this extra
initialization for v4l2 nodes which register their video devices.
For native nodes using v4l2 event handles, add the initialization
before setting up the v4l2 event queue.
Move the function setup_v4l2_event_queue and
destroy_v4l2_event_queue into msm_cam_server.c for better code
organization.
Change-Id: Ifcd148d5d0187cf33a6ea49977010e88d6043698
Signed-off-by: Kiran Kumar H N <hurlisal@codeaurora.org>
Currently when VFE requests for a free buffer, we search based
on the image mode sent from VFE. In some cases, there can be
multiple instances with the same image mode. This means the
buffer lookup logic has to take into consideration other
parameters like current usecase, vfe operation mode etc.
To ease this, add support for buffer lookup based on
the instance handle. The instance handle contains information
about where to get the buffer from. So the buffer lookup
logic does not have to know about other details. The instance
handle is decided when the user sets the format for a particular
instance. It is passed on to the VFE during AXI configuration.
VFE stores this and sends it whenever it requests for a free
buffer for a particular output.
Keep the current image_mode based buffer lookup logic for
legacy targets.
Change-Id: I78c3db77ac4014365c9866ff780ec71ac4c7ff87
Signed-off-by: Kiran Kumar H N <hurlisal@codeaurora.org>
Boot param support for dynamic resolution change for HDMI
as primary case like MPQ. With this change, MPQ can also
be configured for different resolutions than the default
1080p@60Hz using boot parameters.
CRs-Fixed: 373211
Change-Id: I2c8537724ddd1ece7e81e6022afb9315c5147aa2
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Increased the maximum value for controls
V4L2_CID_MPEG_VIDEO_BITRATE and
V4L2_CID_MPEG_VIDC_VIDEO_FRAME_RATE thus by
increasing maximum supported frame rate and bit rate.
Change-Id: I6330d178d12652683cce793b7544572594b5dabf
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
To avoid display underrun issues, configure the MDP clock table's rate
according to DSI Video mode panel's pixel clock frequency by 1.15 times.
Change-Id: I9bc864a754c2d51c9d86ece79863820eb72cdae8
Signed-off-by: Nagamalleswararao Ganji <nganji@codeaurora.org>
Adds support for dynamic Intra frame request by setting
correct command packet size to video hardware.
Change-Id: Id851345176bfececae87927fcd61cc9e3f028828
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Make changes to support dynamic selection
of subdevs through the resource manager. Instead of
choosing the subdevs to be used by the current mctl
session statically during open, the VFE, AXI and VPE
subdevs are now selected and initialized later as per
session requirements.
Change-Id: I8df951b81f0ccc77e5b4f64bf5cf620822cf0175
Signed-off-by: Ankit Premrajka <ankitp@codeaurora.org>
sync_supers task currently wakes up periodically for superblock
writeback. This hurts power on battery driven devices. This patch
turns this housekeeping timer into a deferable timer so that it
does not fire when system is really idle.
CRs-Fixed: 353700
Change-Id: Idc7953b5d0580546808bc5832291ca570837ee7f
Signed-off-by: Yong Wang <yong.y.wang@intel.com>
Signed-off-by: Xia Wu <xia.wu@intel.com>
Signed-off-by: Krishna Vanka <kvanka@codeaurora.org>
This change enhances the android gadget to support more than one
android device. Implemented in order to support HSIC/HSUSB concurrent
mode.
This feature allows to fully run two compositions concurrently on the
HSUSB and HSIC USB cores, besides the following two restrictions:
1. Cannot run some function driver, for example rmnet, both on HSUSB
and HSIC concurrently. Each composition should have a different set
of function drivers.
2. Mass storage can only run on the primary HSUSB core.
Change-Id: I3f57cd237c0499cb6776c17d660bed82be852697
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Apply differences between 8960 and 8960ab, including:
1) Set PLL3 frequency to 650MHz.
2) Update frequency table and FMAX_HIGH/NOMINAL/LOW for mdp_clk,
gfx3d_clk.
3) Update reg_init, 8960_pre_init, 8960_post_init register settings.
Remove all bits marked "reserved" in 8960ab.
4) Separate lookup table into 8960 common clocks, 8960ab only clocks,
and 8960-only clocks.
Change-Id: Ie0fde5c0a289c70005622d61079ed3cddeeae095
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Adds support for high bit rate decoding by
increasing the input buffer size to hold
large input frame data.
Change-Id: I06f8bebddf879104761956bd982c44d854edca2b
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Provide mechanism to decide whether the currently tuned station
is valid or not
CRs-Fixed: 371689
Signed-off-by: Ayaz Ahmad <aahmad@codeaurora.org>
Change-Id: I1f058bdeec8ecebe85b950631118c1ac9604760f
Adds support for VP8 video encoder by adding VP8
entry in venc formats struct.
Change-Id: Icb9fbc049aadd226c7f803ad938d1d76cbb760f4
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
PLL4 may be running at either 491.52MHz or 393.216MHz. Detect the
rate at runtime and select the appropriate frequency tables so that
the same rates for PLL4-based clocks can be used with either
configuration.
To ensure that any PLL configuration done as part of reg_init()
takes place before the rate-detection occurs, move the reg_init()
call to the top of msm8960_clock_pre_init().
Change-Id: I547ce16334acaeee4797147e47684672d8a5bade
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
The current camera bus vector table does not have an entry
for Live snapshot usecase. Add this entry into the bus vector
table. When user takes a live snapshot during video recording,
just switch to this new entry and when its done, switch back
to video entry. Also, correct the .ab value for video usecase
since the current value is not sufficient for all the usecases.
Change-Id: I9c8c9ede2cf22cf8a21383e3d7868c75f21eba12
Signed-off-by: Kiran Kumar H N <hurlisal@codeaurora.org>
As was recently done for 8930, migrate 8627 support from acpuclock-8960
to the newer, optimized acpuclock-krait driver, which is shared among
multiple SoCs while keeping 8627 data in its own file.
Change-Id: I701fdb6fcd94647fc4d37131bcb2d3b41021b0fb
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
The acpuclock-krait library is an evolution of acpuclock-8960 with
several improvements. By dropping support for older versions of the
Krait processors and taking advantages of features only available on
newer Kraits, acpuclock-krait is both simpler and more efficient than
its predecessor. Key advantages in moving Krait targets to the newer
driver include:
- The ability to write to one CPU's CP15 registers from another CPU.
This means it's possible to change a CPU's clock sources after
power-collapsing it, rather than needing to select a low-power
source while it's still up (which slowed down the hotplug path).
It also means acpuclk_set_rate() can be called from any CPU.
- Dropping of obsolete Krait v1 processor errata workarounds.
- Relocation of SoC-specific data into its own files
- Shorter, more readable code
Change-Id: I90bbb41a47cc7c328b1c669d4001c7df76903f7b
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
There is a usecase where compressed data is sent over HDMI IN to
ADSP. The format of compressed is detected in ADSP and sent through
the meta data to compressed driver. Add support for meta data in
compressed TX for this use case.
Change-Id: Idbb18fe4a0ad828e9c2e9d7beec048b3cedf002d
Signed-off-by: Subhash Chandra Bose Naripeddy <snariped@codeaurora.org>
The msm_{un}map_contiguous_buffers lack checks for iommu_present.
This causes incorrect behavior if the APIs are used when IOMMU is
not present. Add these checks to do the correct action when IOMMU
is not present.
Change-Id: If358e17205cabdc97ed361ded4a954780df36f9c
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Fixes a bug introduced in recent commit because of
which only one video session worked. Next video
session always failed when client tries to open
the video device.
The commit ID caused the issue is
fe72c45cf670cb0fafb04a6a2fa6a1aa428435c6
Change-Id: Ib0cbe7cac5189cf617e8b3bcfc549e022e88fd46
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
This test write data to the card, then send DISCARD on random
addresses on the card, send SANITIZE to the card to erase all
the unmapped areas.
Change-Id: I2904023ccd258e64b99b004bacfbe576b0ead59a
Signed-off-by: Maya Erez <merez@codeaurora.org>
GPLL0 is always expected to be on when Linux is running. It is required
for all active BMIC/EBI and NoC clock rates. acpuclock also makes the
assumption that GPLL0_AUX is an always-on source that can be safely
switched to at any time. For current builds used in pre-silicon
simulation environments, however, this is not true because:
1) The bootchain and RPM, which would normally vote for GPLL0 to remain
enabled are not presently in use, leaving clock-8974 as the only
voter for the PLL.
2) The clock driver de-asserts its vote for GPLL0 when there are no clock
driver clients requiring it, resulting in it turning off.
3) The AUX output of GPLL0 is never enabled due a typo in reg_init()
The first point was already addressed in clock-8974.c be enabling GPLL0 as
part of reg_init().
The second point is addressed now, by removing the enable mask for GPLL0.
This is simpler and more efficient than requiring acpuclock to vote for
the PLL. It also avoid the side-effect of blocking XO-shutdown that such
a vote would have if power-collapse were to occur while the CPU is running
from the PLL0 source (which should be allowed).
The third point is also addressed now by correcting the "PLL_AUX_OUTPUT"
macro.
Change-Id: I5abeb6497261119fd1ae674f8b901d360261932f
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
