This ccadc module is reused in multiple pmics. It is now unnecessary
to check for 8921 versions in the driver. As a result of this change
older 8921 versions are not supported.
CRs-Fixed: 372679
Change-Id: I2114f9428e2ba1a29c2bc9caaaa75106caf1dfc3
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Currently the code does not have a mechanism to remember the soc
reported just before shutting down and upon restarting the new
soc reported is off from the previous soc value reported.
This change introduces
- a method to save soc in an unused coincell back register: ssbi address
0x107 is not used on 8921 and serves the purpose of storing the soc.
The driver reads this value and uses it to scale the reported soc.
- a method to detect that a battery was removed and perhaps replaced by a
different one. If the battery is found replaced the driver is notified
of the change and it disregards the soc value it read from the backup
register. The charger driver has a battery backed bit (force vref
therm) which it sets in its initialization sequence. Once set the
value remains between restarts, unless the battery is removed. The
default value of this bit is 0. Hence if a zero is detected before
writing to it, battery was removed between restarts - this mechanism
is used to notify the BMS to disregard the soc read from the backup
register.
Note that for this to work correctly the bootloader needs to be updated to
not overwrite register 0x107 upon restart.
CRs-Fixed: 370287
Change-Id: If7d098552d36eb27a396ee7d37f78d3629861f6e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Problem Description:
Open and close the same set of slimbus ports after
certain iterations will fail port open, as that port
was not disconnected successfully.
Fix Description:
Handle sequence of closing slimbus ports. Store
the channel masks associated with each codec dai
and reset them after they are closed from slimbus
Then, release the close slimbus port event, after
all the channels are closed completely
Change-Id: Ie14b9f0920b37f905151b48f18df181503acc21d
CRs-fixed: 370761
Signed-off-by: Swaminathan Sathappan <Swami@codeaurora.org>
Add pm8xxx-tm subdevice into pm8038-core. The pm8xxx-tm device
can be used to access the real-time PMIC die temperature. It
can also be used to trigger an interrupt when critical
temperature thresholds are reached.
Change-Id: I4b8bda1d51cafaa6b77408da4c183bdb2dc4327a
Signed-off-by: David Collins <collinsd@codeaurora.org>
There is a dependency for the CCADC calibration work on the BMS
driver. This prevents some devices that do not use the BMS
to utilize the CCADC.
Remove this dependency by moving the ccadc calibration
work to the CCADC driver to avoid this.
Change-Id: If43c781d6d2bc27f64dbbe594b6e81c5a5642f0b
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
The WCD9320 Codec Driver is an ALSA-compliant codec driver. This driver
constructs the internal codec audio paths with DAPM widgets and
controls and provides the controls to the upper layers to enable and
configure audio paths.
Change-Id: Iee29359bebfc838cd200732b7191a2eb6a2087ee
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
Create a PM8XXX regulator driver that can support PMIC PM8921
variants including: PM8018, PM8038, and PM8921.
Change-Id: I60d1302e4af9a4c5caa72301c904867acd2ebe0f
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add a PMIC PM8xxx thermal management driver which handles
interrupts associated with thermal overload events and
which provides a means to read the current PMIC die
temperature.
Change-Id: I2063be9335be2971810358e82dd273e8a0acec5a
Signed-off-by: David Collins <collinsd@codeaurora.org>
Alarm interrupt causes automatic wakeup even when the phone is in
powerdown state.
Change-Id: If3ae30304adba4f07284a3dc496956d67a1ae1b0
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
pm8921 chip is equipped with a smart battery gauge called bms.
BMS is capable of intelligently measuring battery parameters
under various loads, the software uses these reading to
accurately determine battery capacity.
Add driver for the bms module.
Change-Id: I0655c19bc9edc6aea15fb66b4de8d647a305416f
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Until now only the BMS system was using the ccadc so there was
no need to create a separate ccadc driver.
However we can run in a configuration with BMS disabled
and clients won't be able to read battery current via ccadc.
Separate the ccadc from the bms, this change in is preparation
to add a ccadc api to read the battery current.
Change-Id: Ib96b146d91d01d196df9291eb23432cd430db4d0
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Move the following subdevices to use the pm8xxx interface -
mpp, irq, gpio, keypad, power-key, leds, othc, vibrator,
rtc, batt-alarm, thermal, upl, nfc, pwm, xoadc, regulators,
xo-buffers, charger.
This allows usage of a common driver for modules which are same
across multiple PM8XXX PMICs. It also provides flexibility
to add/remove subdevices for multiple board configurations.
Change-Id: Id9795552fc9f4a2c920c070babfaef1f4cd6ca61
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
This driver uses the timed output framework to
support the vibrator functionality.
Change-Id: Ibd21dffb458e8eecd283e80f127ab44f84d1d6c8
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The current core assumes TABLA as the only codec driver registering.
To support single binary for multiple targets its essential that
we remove this restriction and move to a generic framework
to support multiple codec. This can be done by moving all codec
specific code to dedicated codec driver and use core driver to probe
the codec based on slimbus device id and do generic setup for the
codec. This also helps to have same boards with different flavours
of codec variants.
The WCD9XXX family of codecs share the initial codec register
mapping which holds the Slimbus device id to identify the
codec existing on the target.Core driver now registers the
codec device based on this check.
Change-Id: I4c43d5f04c20696f4f5138411460681ec7879d34
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a driver to control the battery alarm module of PMIC PM8xxx
devices. This module uses a pair of comparators to determine
when battery under and over-voltage take place. A wakeup
interrupt is triggered in these cases which can then run any
notifiers which have been registered. Also add APIs to
configure the threshold voltages and the frequency at which the
hardware checks the state of the battery voltage.
Change-Id: Id0b82f9090b29ce743b5e0faac17853c94111771
Signed-off-by: David Collins <collinsd@codeaurora.org>
The driver adds support for configuring the following parameters for
external pmic speaker amp driver
1. Gain
2. Mute/Unmute
3. Speaker enable/Disable
The above operations are supported by driver by exported apis
from kernel space.The Machine driver from ALSA would use these
to configure speaker.
Change-Id: I9817f5d5c2952ca423b84f35162a842123e4d413
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
Add a PMIC 8XXX driver which will contain several miscellanous APIs.
The API that is needed is pm8xxx_reset_pwr_off.
Change-Id: I923d01cfd9dc3f8e760ae45d70799f80af65e88c
Signed-off-by: David Collins <collinsd@codeaurora.org>
Qualcomm PM8xxx chips, such as PM8058 and PM8921, have 8 channels of
PWM, also called LPG (Light Pulse Generator) in HW specs. All PWM
channels can be used as simple PWM machine or as a more advanced PWM
pattern generator using programmed lookup table.
This patch supports all APIs listed in <linux/pwm.h> with a small
difference. The two parameters (duty_ns and period_ns) in pwm_config()
are used as values in microseconds instead of nanoseconds. Otherwise a
32-bit integer can't fit for a range of 7 us to 300+ seconds.
Change-Id: Ic8f59e96360ea3dabef591e0b257a4ffe0796d9b
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
Add support for the irq controller in Qualcomm PM8821 pmic. The
interrupt controller provides control for MPPs configured as
interrupts in addition to other subdevice interrupts.
The PM8821 IRQ controller is simpler than Secure IRQ controller
in other PMIC4 family of chips, i.e. PM8921. Also, it does not adhere
to SSBI register layout of Secure IRQ controller. This driver follows
the SSBI register layout of PM8821 IRQ controller and supports only
PM8821 IRQ controller.
The interrupt controller also provides a way to read the real time
status of an interrupt. This real time status is the only way one
can get the input values of gpio and mpp lines.
CRs-Fixed: 366276
Change-Id: Id4b9cbf42f296c26d4f8780590389bb2265e46c0
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8038 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug.
Change-Id: I83f995cc238699100a05e82d04b45ea2a63eb667
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add support for the Qualcomm PM8018 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, GPIO, MPP, RTC, Power Key,
Misc, and Debug
Change-Id: I5787768603cb34bd3c9486d5c7d3fcf27a781ee9
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for the Qualcomm PM8821 PMIC chip. The core driver
will communicate with the PMIC chip via the MSM SSBI bus.
Initial support is provided for: IRQ, MPP, and Debug
Change-Id: Ic072e634c55925292196a3e710d2dc628cbf2780
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
Add #define constants to describe the revision value of a given
PMIC (e.g. 8058, 8901, or 8921).
Change-Id: I45762c785622fa1259638d33c6529b210a2f143e
Signed-off-by: David Collins <collinsd@codeaurora.org>
Until now only the BMS system was using the ccadc so there was
no need to create a separate ccadc driver.
However we can run in a configuration with BMS disabled
and clients won't be able to read battery current via ccadc.
Separate the ccadc from the bms, this change in is preparation
to add a ccadc api to read the battery current.
Change-Id: Ib96b146d91d01d196df9291eb23432cd430db4d0
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
[sboyd: Take only 8921-core parts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Instead of hard coding the flag into led driver, pass it
from board file.
While at it, re-factor the code to separate led upstream
core data with board specific data.
Change-Id: I9726f8444d422fdbebdbd5d5e0c5beb6288aa5b1
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
[sboyd: only take pm8921 part]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The reset interrupt in the pmic indicates the pmic will shutdown
the msm in few seconds - it does so by lowering the reset_n line
to the msm.
When this interrupt is triggered it is required that no more ssbi
transactions are initiated and the msm should cleanup and prepare
for the impending shutdown. There is no need to lower ps_hold in
this case as the pmic will shutdown the msm regardless.
Also since we don't want any ssbi transactions, force shutdown
nonboot cpus. This will prevent ssbi transactions to the pmic for
lower/raising nonboot cpu's voltages as they enter/exit idle states.
Change-Id: If2b392c2a0494356f17bf3b721e396da2af44dd2
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
[sboyd: take header part only]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add an mfd cell for the PMIC 8921 battery alarm into the
pm8921-core.
Change-Id: Ia856c88050aa99822e6541311f40417ec63964d4
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add an mfd cell for the PMIC 8921 thermal alarm into the pm8921-core.
Change-Id: Icd791e879b5289a4b0af374f0f08d928c6b15719
Signed-off-by: David Collins <collinsd@codeaurora.org>
The VBAT IRQ needs to be controlled by the pm8xxx-batt-alarm
battery alarm driver. Remove VBAT IRQ control from the
pm8921-charger driver.
Change-Id: I478b4b572e4c08cfcd50ba4c288f847ea549f775
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Drop charger part]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
pm8921 chip is equipped with a smart battery gauge called bms.
BMS is capable of intelligently measuring battery parameters
under various loads, the software uses these reading to
accurately determine battery capacity.
Add code to support the bms driver.
Change-Id: I5f14a82db0fda11adc0404ba58704a25fa7713af
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add a mfd cell of adc as part of the pm8921 core. It adds the
interrupts allocated for the ADC/BTM driver.
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Change-Id: I68e1f8df9e24a2512869f238cb3b2fccf09aa8de
PHY OTG comparators can be disabled for maximum power savings. PHY
can not generate ID interrupt in this case. As USB id line is routed
to PM8921 on MSM8960, depend on PM8921 for ID interrupt.
Change-Id: If375274d30235f7e950e284fabc72a4d6b5bc269
Signed-off-by: Vijayavardhan <vvreddy@codeaurora.org>
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[sboyd: only take the pm8921 part and reword subject]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add an mfd cell in the pm8921-core for a pm8xxx-misc device.
Change-Id: I0bc955c118aa427e45a4d2ce80065ca1d7c146a9
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add a pair of APIs in pm8xxx/core.h: pm8xxx_get_version which returns
an enum representing the type of the PMIC (8058, 8901, 8921, etc) and
pm8xxx_get_revision which returns the silicon revision of the PMIC
chip.
Update pm8921-core to implement this new API and remove core data
members previously used to pass revision information.
Change-Id: Ib2aaf5843e4aef9281745919908c530b85717510
Signed-off-by: David Collins <collinsd@codeaurora.org>
The 8921 pmic is equipped with a charger block that can trickle charge
and fast charge a battery. The charger block has 32 interrupts for
notifying various charging events. It needs some parameters such as max
and min voltage of the system, charging resume voltage.
Add code to support the charger module in the core file.
Change-Id: I082b3009dd070af4120b1cd170972e7bf88ce810
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Qualcomm PM8921 has a PWM module which can output 8 channels
of PWM signals. This patch adds a PWM device in the sub device
list of PM8921 core driver.
Change-Id: I0799f12dafdffaedcb7cd13bee0d13993931d3a2
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
Create a regulator driver to control all regulators on the Qualcomm
PM8921 PMIC chip. This chip contains many different types of
regulators with a wide range of abilities and voltage ranges.
Eight different regulator types are available on the PM8921. These
are managed via 7 different type values in the driver:
LDO - low drop out regulator (supports both NMOS and PMOS LDOs)
NLDO1200 - 1.2A NMOS LDO (different control structure than other LDOs)
SMPS - switched-mode power supply
FTSMPS - fast transient SMPS
VS - voltage switch
VS300 - 300mA voltage switch (different control structure than
other switches)
NCP - negative charge pump
The driver interfaces with the PMIC using Qualcomm's SSBI bus.
Calls to this bus are abtracted through the pm8xxx_readb/writeb API.
Change-Id: I01fb755c6be8e3f32c86fef079b5740edfc39f14
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Take only pm8921-core bits]
This driver is to provide a shim layer between ssbi driver (under i2c
framework). It provides interrupt multiplexing and MPP control.
Change-Id: I13c05d8477f3ea66dd368f167453ec19c8a622c3
Signed-off-by: Bobby Crabtree <bobbyc@codeaurora.org>
TSADC is part of marimba multi-function chip, which is
driver over SSBI as well as having die-to-die
connection with TSSC - Touchscreen controller in MSM.
Signed-off-by: Trilok Soni <tsoni@qualcomm.com>
This driver programs Timpani Wideband Codec for
input/output of audio signal.
Change-Id: Id7fb88c0599437e4bfb138c3c1deb124af6c4104
Signed-off-by: Parick Lai <plai@codeaurora.org>
Marimba wide-band codec driver controls audio codec on marimba
die. The driver conforms to multi function device model. Thre audio HW
paths are supported. They are RX, TX, and loopback. Three clients
can access service of driver simultaneously as long as they don't try
to configure same path.
Signed-off-by: Patrick Lai <plai@quicinc.com>
