Venus PIL platform driver is used to bring Venus Video subsystem
out of the reset and start executing code. It also supports
shutting down the subsystem to save power when it is not in use.
Change-Id: I6e305efe548524fc71ee2fa2fba05b6b2b783ff7
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
This patch adds support for CMA to dma-mapping subsystem for ARM
architecture. By default a global CMA area is used, but specific devices
are allowed to have their private memory areas if required (they can be
created with dma_declare_contiguous() function during board
initialisation).
Contiguous memory areas reserved for DMA are remapped with 2-level page
tables on boot. Once a buffer is requested, a low memory kernel mapping
is updated to to match requested memory access type.
GFP_ATOMIC allocations are performed from special pool which is created
early during boot. This way remapping page attributes is not needed on
allocation time.
CMA has been enabled unconditionally for ARMv6+ systems.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>
Conflicts:
arch/arm/include/asm/mach/map.h
arch/arm/mm/init.c
arch/arm/mm/mm.h
arch/arm/mm/mmu.c
Change-Id: I85e3b43a9fa1e3c4d33cbc85fff6dee1b815041d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
DWC3 has separate irq line for OTG interrupts (e.g. ID / BSV).
These interrupts are needed to detect cable connect and disconnect
events. Hence, request for this interrupt line from OTG driver.
Also, update device tree binding documentation for DWC3 core.
Change-Id: Ie97e4b3b5dcf840eabeb01b5c5d6531a8a70a3c9
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Add device tree support to sound soc audio drivers.
These drivers get registered to the alsa framework
and thus aid detection of soundcard.
Change the device tree entries to follow the new
design approach of having individual probe functions
for each audio interface.
Change-Id: Ie8f0bddd5ba6e2cfb66c6a23efdcb434c5082d7d
Signed-off-by: Phani Kumar Uppalapati <phanik@codeaurora.org>
Add necessary match table so this driver can be used in
Device Tree configurations
Change-Id: I4e7fd0c1bb1d9f22296f70cf5710016b10046cd5
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
SDC controllers need two types of power supply:
- vdd (SD/eMMC flash core power supply)
- vdd_io (SD/eMMC I/O pad power supply)
Add support for enable, disable, low power mode setting
for these regulators.
Change-Id: Ifd0ef0d4dd9732893f49700fe86b1dad24497f71
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
The Contiguous Memory Allocator is a set of helper functions for DMA
mapping framework that improves allocations of contiguous memory chunks.
CMA grabs memory on system boot, marks it with MIGRATE_CMA migrate type
and gives back to the system. Kernel is allowed to allocate only movable
pages within CMA's managed memory so that it can be used for example for
page cache when DMA mapping do not use it. On
dma_alloc_from_contiguous() request such pages are migrated out of CMA
area to free required contiguous block and fulfill the request. This
allows to allocate large contiguous chunks of memory at any time
assuming that there is enough free memory available in the system.
This code is heavily based on earlier works by Michal Nazarewicz.
Change-Id: I8a04c58b0d39ee7343ac0b58b6dad9d57912c91d
[lauraa: fixed Kconfig conflict]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
The official name for copper is MSM8974.
Switch to it.
Change-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Add support in the rpm-regulator-smd driver for the "corn"
voltage corner parameter. It can be used with some regulators in
order to specify voltage performance corners instead of discrete
voltages.
Initial support is provided for MSM8974 SMPS 2 (VDD_Dig).
Change-Id: Icac67a1e5594d0aa54f3f6bd8aa8ac1edacc36d9
Signed-off-by: David Collins <collinsd@codeaurora.org>
In case of a watchdog bark time out, dump
the cpu alive mask and last pet time, to determine cpu
hangs or deadlock scenarios as cause of the timeout.
In case of a kernel panic, adjust bark and bite
timeouts based on panic timeout, to allow for completion
of panic handling prior to watchdog bark or bite.
Change-Id: I4401db681cbad54abb0f14ae84550fc63663fb04
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
The test scheduler allows testing a block device by dispatching
specific requests according to the test case and declare PASS/FAIL
according to the requests completion error code
Change-Id: Ief91f9fed6e3c3c75627d27264d5252ea14f10ad
Signed-off-by: Maya Erez <merez@codeaurora.org>
Add mpp support to the qpnp-pin driver. MPP support allows for
additional devices to be specified in the Device Tree topology.
This support is implemented in the same driver as the GPIO
support since the address map is very close between them.
The addition of this support does not change the existing gpio
support.
Default MPP configuration can be specified in the Device Tree
using the three new bindings for mpp. Any attribute not specified
in the Device Tree will assume its default configuration.
It's also possible to configure an MPP at runtime using the
existing qpnp_pin_config() API. If a given configuration feature
is not supported by the underlying hardware pin, then that
particular request is silently dropped with no error. This allows
for gpio users to continue specifying only a subset of the full
qpnp_pin_cfg structure.
Change-Id: I2b72768647de2a371edfa05c52fc1ed776c215c0
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
qpnp-gpio manages gpio_chip queries based on the slave
ID. This has a limitation in that it restricts the number of
gpio_chips per slave ID to one. However, some PMICs have both MPP
and GPIO on the same slave, and thus the slave ID is not a
meaningful unit to search for.
Instead, make use of the 'label' binding to give the
primary dev-container node a name. This name will serve as the
gpio_chip label, which can be used in lookups.
Change-Id: Ic20caeb4622d73449a983992275446c733ddd89a
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since QPNP PMICs also include support for MPP, and since we
intend to support MPPs in the same code base, it's not
appropriate to limit this the scope of this driver to 'gpio'.
Change the driver name to 'pin' since it more accurately
describes the potential for this driver.
Also update the Device Tree include files for the name changes.
Remove a superflous 'gpio-pin' definition in the msmcopper
specific include file, since such configuration shall never
change. This binding should be defined in the PMIC specific
include only.
Change-Id: Id1d6407039908e3cf44dfc19af71f0cdc7aff8e6
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since we support multiple device_nodes per spmi_device when used
with the spmi-dev-container flag, it's often unclear how a driver
should make reference to a particular device. Therefore,
introduce the spmi specific binding spmi-dev-name that specifies
the device name for the device_node.
Also introduce an API that can be used from
the driver to lookup the specific device node associated with a
particular device name.
Note that it may seem at first glance that the binding 'label' is
redundant with device_node->name. However, per the ePAPR,
device_node->name is intended to be as generic as possible,
representing the function of the device and not the precise
programming model. 'label' is used to give a platform
specific name that can be queried from device drivers.
Change-Id: I28eca35d0b625372c26a6d8ad81e7679f200d14b
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
reg-names and interrupt-names are standard bindings to map device
tree reg and interrupt indices to particular names. This way the
driver does not need to be concerned with hard coded assignments.
Therefore, add spmi support for these bindings.
Explicit support for reg-names is required since the
implementation does not make use of of_address_to_resource(),
which happens to already support this.
This is because of_address_to_resource() mandates address
translation, which is not relevant to spmi.
interrupt-names is already implicitly handled by
of_irq_to_resource(), which is used in the spmi implementation.
Add additional documentation to state clearly that this binding
is also supported.
Also add supporting routines to easily lookup a resource by name
for both registers and interrupts.
Change-Id: I94faf950da5106ecd4ff36f47e5b46102d9bd426
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Code changes to add support for Low Power Resource Manager Driver.
This code will manage PXO, VDD dig and Vdd mem based on the idle
mode the kernel chooses and updates the RPM sleep vote accordingly.
Change-Id: If3af14920e17c010c8e77b550ab57d532b32e6cd
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
The SPM device tree entry to configure L2 SAW doesn't distinguish
between Krait and L2 SAW low power modes. Update the device tree to
differentiate between L2 and Krait low power modes.
Change-Id: I6c7cf6f8dd10478fd53826e22b17ed98d46b68b4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Remove tzcom driver components that includes files,
clock definitions. Currently tzcom driver has been replaced
by qseecom driver.
Change-Id: I1832d921a7b949057b84a7e0aa9afaa445be5194
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
The write packing control will ensure that read requests latency is
not increased due to long write packed commands.
The trigger for enabling the write packing is managing to pack several
write requests. The number of potential packed requests that will trigger
the packing can be configured via sysfs by writing the required value to:
/sys/block/<block_dev_name>/num_wr_reqs_to_start_packing.
The trigger for disabling the write packing is fetching a read request.
Change-Id: I982170fa6dca9150ea4310bb546b838b7fd30e9b
Signed-off-by: Maya Erez <merez@codeaurora.org>
Added text file which describes MPQ DVB adapter implementation
and the extensions made for linux DVB core
Change-Id: I50df66a8bec52c224dd00be205ffc022c4d1f13a
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
SMMU v2 is based off the ARM SMMU architecture specification.
The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory. In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.
The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.
Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
This new mode allows Neighbor discovery packets to be sent to userspace
without regards to the state of the forwarding setting. Without this, NDP
packets addressed to the host are still received, but those for other
addresses are not.
Enabling this mode allows NDP proxying to be performed from userspace.
Change-Id: I69b7a7c0c42e3253c42d6f2e163c0ce1d848aed6
Signed-off-by: Jaime Lopez <jaimel@codeaurora.org>
The header file was renamed to pm_qos.h in e8db0be (PM QoS: Move
and rename the implementation files, 2011-08-25) but this
documentation wasn't updated. Update it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add device tree support for MSM HSUSB. The OTG driver registers
gadget and host platform devices based on the operational mode.
This patch also updates the copper device tree source file with
HSUSB device specifics.
Change-Id: I0a50b0500d15f32ff65468cdb411398a80a20329
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Add MSM USB3.0 super-speed controller.
The MSM USB3.0 controller is a wrapper of Synopsys's DesignWare
USB3.0 controller which also includes other HW units as the DBM.
The copper device-tree now includes a new device for this controller,
which will be attached to the dwc3-msm.c driver.
The dwc3-msm.c driver will be used for MSM specific operations of USB3.0
(as managing the DBM) and for now it just add in runtime a core dwc3 device
that will be attached to the dwc3/core.c driver.
Change-Id: I1e0a9144971b2de533d4d1ce7ac5f0c3584d1930
Signed-off-by: Amit Blay <ablay@codeaurora.org>
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
An EHSET test fixture is used to initiate test modes on an embedded
host controller while performing the usb host compliance testing.
During enumeration by the USB host this test fixture presents a VID/PID
pair and this PID value corresponds to the requested testmode.
Change-Id: I7558f9c1c37b3c65be2b358d964b295593c021d9
CRs-Fixed: 174266
Signed-off-by: Manu Gautam <mgautam@qualcomm.com>
Extend the of_get_regulator_init_data function so that it can
parse an additional property from regulator device tree nodes
which is needed to support non-device tree consumers.
The new property is named qcom,consumer-supplies. Its value
is a list of strings of the form:
qcom,consumer-supplies = "supply_name1", "device_name1",
"supply_name2", "device_name2", ...
Change-Id: Ia689d04e6de568e6889b807eed15df3116de01d2
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add the qpnp-regulator driver to support regulators found in
Qualcomm plug-and-play (QPNP) PMIC chips. QPNP chips make use of
Qualcomm's SPMI register convention. The particular hardware
characteristics of a given regulator can be derived from the
values present in the type and subtype registers.
The qpnp-regulator driver supports probing with either device tree
device specification or with board file specified platform data.
Change-Id: I4f74431a50949763d651faf992b5d2567d05758e
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Squash in DT binding document]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The spmi-dev-container binding is intended for SPMI
configurations that have multiple device nodes associated with
only one spmi_device. By default, if this flag is not specified,
each device node will create a new spmi_device.
Sometimes having multiple spmi_devices for SPMI device nodes is
superfluous. One example of this is gpios. In some architectures,
a single gpio is treated as a unique device. But from a gpio_chip
perspective, the chip is comprised of many gpios. Beyond wasting
memory allocating a unique spmi_device per gpio, the implication
of not coalescing spmi_devices is that the clients probe() routine
would be called N number of times. But this sort of behavior makes
it difficult to realize when a gpio_chip starts and stops. If we
assume that one gpio_chip represents one call to probe(), then
this problem is solved, since all gpios in that chip will be
passed as resources.
In order to support multiple device nodes per spmi_device, we
also need to extend the data structures for spmi_resources.
This change also makes an effort to cleanup some of the error
handling for illegal combinations of device bindings, as well as
adding some additional documentation.
Change-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This binding is currently used to indicate all devices existing
in the same slave. Let's change the name to be more meaningful.
The real motivation here is that we want to introduce a new
binding to specify all qpnp devices existing in the same
spmi_device. So spmi-dev-container is a more meaningful name for
that usecase, and spmi-slave-container better describes the
former.
Change-Id: I48f834b9cff9ea90d05f5e958ca21bef0ab56a86
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and
is used to communication with one or more PMIC (slave) devices on the
SPMI bus. The PMIC Arbiter is actually a hardware wrapper around the
SPMI controller that provides concurrent and autonomous PMIC access
to various entities that need to communicate with the PMIC.
The SPMI controller hardware handles all of the SPMI bus activity (bus
arbitration, sequence start condition, transmission of frames, etc).
This software driver uses the PMIC Arbiter register interface to
initiate command sequences on the SPMI bus. The status register is
read to determine when the command sequence has completed and whether
or not it completed successfully.
Request Capable Slave (RCS) devices can initiate a master write
command sequence on the SPMI bus that the can be decoded by the
bus master and used to generate interrupts.
Change-Id: I037fefc946ccb5b8e0b04da856a3a96effe1c7e4
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This change adds SPMI Device Tree parsing. The
of_spmi_register_devices() API should be called from the probe()
routine of each SPMI controller to parse the subtree and add the
respective SPMI devices.
The SPMI subtree is nested up to two levels deep. The first level
is the most basic and treats the address as the SPMI slave ID.
This should be used for simple devices that has no notion of
segmented SPMI address spaces.
An optional second level specifies the address as an offset
within the outer layer's slave ID. This is used to specify
multiple devices on the same slave ID that have different address
ranges. In fact, it's reasonable to specify any number of address
ranges at this level.
Devices can also specify any number of interrupts that's decoding
is done by an external interrupt device.
Sections of this code were taken from drivers/of/platform.c.
Change-Id: Ib9f06764a9bd85e3b2aab43b72aa7132885aa044
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Including the following patches:
commit 0f7723bb09440ae69743fed38cf558a838aa9bdf
Author: Bryan Huntsman <bryanh@codeaurora.org>
Date: Thu Oct 6 23:13:56 2011 -0700
Revert "spi_qsd: GPIO configuration changes for SPI chip-select line"
This reverts commit 7eaa08b75995289a91c7dd1f3616f79227f5f923.
Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>
commit 7eaa08b75995289a91c7dd1f3616f79227f5f923
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 28 16:26:39 2011 -0600
spi_qsd: GPIO configuration changes for SPI chip-select line
The chip-select GPIO's pertaining to each slave remains in suspended
configuration until the first transfer is intiated by the slave.
Change-Id: I3aa8555289be7ce457b91a969cf03909be0965d7
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e47df9f9b932968152ab2908153e60adab4402d7
Author: Jordan Crouse <jcrouse@codeaurora.org>
Date: Mon Sep 19 11:21:16 2011 -0600
spi_qsd: Fix possible uninitialized variable
Change-Id: Ic0dedbad184046e9835cde015ad5d592f33e82a6
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
commit 4ae02c76b98f2b96bfb8c4fa02f40cfda2f16f97
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Sep 20 17:28:50 2011 -0600
spi_qsd: Fix Klocwork errors in SPI driver
Change-Id: I1fe6632e68ea625966aced37a1b140b30534e101
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 52e065ba3d86977b59937693ac7e85836cf4eca8
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Sep 1 12:12:58 2011 -0600
spi_qsd: Fix for SPI Operational State Invalid error
This error is reproted randomly when the SPI core is put
into RUN state and occurs when the ACPU clock is low.
When the timer expires, we check again to ensure that the
STATE_VALID bit is set before returning.
Change-Id: Ic8912534f4924efd999b8aa1d75a9fd19749e870
CRs-fixed: 304672
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a9a8816913e5466e06b443c42cbf8ae866b95fd1
Author: Jeff Ohlstein <johlstei@codeaurora.org>
Date: Fri Sep 2 13:55:16 2011 -0700
msm: dma: remove crci conflict checking
The crci conflict checking code was designed for a system where a crci's
mux could be changed at runtime. In reality, our chips configure these
statically, so it is not necessary.
Change-Id: I4d5f32cd8728d3c78fca8f64aed0e02b57b6afba
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
commit 36c6f1bb48af3e65db281cc7ccb913a8e81a598e
Author: Matt Wagantall <mattw@codeaurora.org>
Date: Wed Aug 17 15:44:58 2011 -0700
msm: clock: Rename all I2C/SPI clocks to 'core_clk' or "iface_clk"
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name.
Change-Id: Iab12caf4eab163773d68f1b2adc1bb4c72c69e83
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
commit 55e656e68cac78eaa367341df2e693a483a53f84
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon Jun 6 14:34:38 2011 -0700
drivers: barriers: Replace dsb() with mb()
Replace explicit dsb() calls with mb(). Now that the
generic ARM implementation defines mb() to mean (at least)
dsb(), it is appropriate to switch back to the generic
kernel version of the barriers. This is also needed for
correctness on certain targets (such as 7x27) where dsb()
is insufficient and other operations (such as outer cache
sync or writing to strongly-ordered memory) are required to
ensure proper I/O operations ordering. In some cases,
remove explicit calls to outer_sync following a barrier
since the barrier will now have an explicit outer_sync
call.
Change-Id: I2c53b8534af9c3cbac4d4d77b322f897a39e7758
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit 17194a32164b868f80ce84e313f9148d1dc77e7b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 3 18:10:09 2011 -0600
spi_qsd: GPIO configuration changes
On suspend, the SPI related GPIO's enter a low power configuration
and on resume they move to an active configuration. This helps
conserving power during power collapse.
Change-Id: I0911867e10fadcfc6950f6dddf74226bd6321c16
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 1777d88688511cd59bad7674c6a2246e0c93142b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Jun 1 16:54:07 2011 -0600
spi_qsd: Remove restriction on SPI clock speed.
When multiple slaves are connected to the SPI controller,
the driver does not allow the clock to go from lower speed
to a higher speed. This restriction is not required since
there can only be one slave listening at a time. Also,
there are no hardware limitations in doing so.
Change-Id: I4ecabfb3a1515416f050c18678cf0987dcde9d1e
CRs-fixed: 290127
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 4b7c7bfc546cb02141da9d034421aefe5635f857
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 7 14:18:42 2011 -0600
spi_qsd: Add null pointer check before dereferencing
During probe, there is no cur_msg to set the status.
Change-Id: I82e00b9d74d45c36b70078b171db1bb150d1bfac
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit bf514c766fcc2bdee680f80a2ea16c7fead0be96
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon May 16 13:37:11 2011 -0700
msm: spi: Fix access to unclocked registers
Don't program the GSBI configuration until the clocks have
been turned on.
Change-Id: Idee5f5dffcb5ed0f7de18f1e508ee8c76b618894
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit d9c248213f4cd025f3d3586f0de81e4bc44a5a54
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon May 16 16:43:08 2011 -0600
spi_qsd: Fix for SPI input overrun error
This error occurs due to a bug in the controller.
This bogus error is reported when a transition from run
to reset state occurs and if the input FIFO has an odd number
of entries.
Change-Id: I555864d4855ac6d416997da69d8bc6aee7a82178
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e99ceb5b3da7bec51be853809c25df8e32b2c1e6
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Apr 14 18:36:34 2011 -0600
spi_qsd: Multi-transfer handling
When there are mulitple SPI transfers in a message, we
default to using FIFO mode for all the transfers. As special
case, we handle a WR-WR or WR-RD transfer where we choose
between FIFO mode and DM mode based on the total length of
the transaction.
Change-Id: I6fbc1a06a22f9782db5b97c9b87cc53392a8c2fa
CRs-fixed: 276666
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 8f3d3aaa51603a929027bc820fe2d3515e959779
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Apr 19 14:19:29 2011 -0600
spi_qsd: Ensure IO operation ordering
Adding memory barriers to ensure that the writes and reads
to the SPI and QUP registers happen in the correct order.
Change-Id: I86d8f63b0e9547a2339ee4ab5c713cf8864fef04
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 36b3fae5f54230cd1e4ca072d1f55cb2f79d8945
Author: Laura Abbott <lauraa@codeaurora.org>
Date: Thu Oct 14 12:48:16 2010 -0700
spi_qsd: Fix section mismatch
The function msm_spi_probe is referenced outside of the __init section.
This fixes the problem by calling platform_driver_probe instead of
platform_driver_register since this device is not hotplugable.
Change-Id: I3a563c6fc562ada959317b54ff60a38f9ce517d8
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
commit dc2e36eecefb6628031afeff28afd9d97f2f3f6f
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 29 16:58:20 2010 -0600
spi_qsd: Changes to support DM mode.
The dma_config function may not always be present.
This change makes sure the driver gets DM resources
irrespective of the dma_config function.
Change-Id: I25a2497d20e973f22b76f2b5d6f68c86bd4d5f1d
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a39bd4a398674c320925540eec91d94d2b7d53f3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Aug 19 17:48:01 2010 -0600
spi_qsd: Modify timeout mechanism to check SPI state valid bit.
In order to allow sufficient time for the SPI state
transition to occur, calculate the timeout based on
the SPI clock speed.
Change-Id: I3d6955b2a64a8bf8980590e352fbd564250210fb
CRs-fixed: 250998
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b5887b644ba9545672d637985713c7e0e2e5bb50
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Aug 3 16:57:33 2010 -0600
spi_qsd: Use FIFO mode when DM mode configuration fails.
When the Data Mover configuration fails, the driver
uses FIFO mode.
Change-Id: Iaf83e50fe725654c58260c5cd1150cdeb56f51c8
CRs-fixed: 249238
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit ced8ad320d480006643a3aa3474f5c0d77457454
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon Jun 28 16:01:33 2010 -0600
spi_qsd: Use SW timeout instead of SPI_TIME_OUT register.
Since the software timeout is already present in the driver,
the hardware SPI_TIME_OUT register is being removed.It is just
redundant and used only for debugging purposes.
Change-Id: I829cb944444fc3e5053bc810adffe2b87f511b63
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 35e9155f59317e8ef63b8ce5190f26f5cae6a8ee
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 25 16:48:25 2010 -0600
spi_qsd: Disable irqs in the probe function.
The irqs are disabled at all times in the probe function
irrespective of the use of remote lock.
Change-Id: I0997d07b93c97a12bca6d80a9bba59682b1bec3e
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e6af92d74a35ba267125bc61c2c6c18034c03af3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 22 12:20:46 2010 -0600
spi_qsd: Disable clocks and irqs when SPI bus is not in use.
The SPI clocks and irqs are enabled per workqueue and correspondingly
disabled once the workqueue is completed.
Change-Id: Ib22b7e3b946eb4c829940e43327caaf5aff7721b
CRs-fixed: 242866
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b25e4220efdacc231cb150fc263af1e3f525b165
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Jun 8 15:25:47 2010 +0300
spi_qsd: Add usage of MX_WRITE_COUNT register
Use MX_WRITE_COUNT register to reduce the amount of TX interrupts in
FIFO mode for transfers smaller than FIFO size.
Change-Id: I7208fdc85b626a31a8b781ee5c56f73beee6c427
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 7ed56f3441c5ebe7fd8107fb8468207a88bc743f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Jun 9 16:14:44 2010 +0300
spi_qsd: Minor changes to support Data Mover mode on QUPe core
Minor changes to support Data Mover made on QUPe core.
Change-Id: I54663115a43f7fd9b52a2ddee796b5499d5f239a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a85fd0ab6484eb2ef404c062adffce1ee22337f1
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Jun 3 13:57:02 2010 +0300
spi_qsd: Add support for QUPe controller
QUPe controller is a new version of Qualcomm SPI controller. The
controller also supports other peripheral protocols, however its SPI
functionality is very similar to previous SPI core, supported by spi_qsd.
Therefore the same driver is being utilized with some register address
modification and minor flow change.
Change-Id: Ic091ef2c2ed699b43f786c278b613e69a7e9039b
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit ce270f6f9198cf40ee5638b35e595da81116241e
Author: Jeff Ohlstein <johlstei@quicinc.com>
Date: Thu Apr 29 13:40:53 2010 -0700
drivers: spi: Support ADM3 in spi_qsd driver
Change-Id: I6dfa38a4c33a8e4619d56ce30787e1aeafc8356d
Signed-off-by: Jeff Ohlstein <johlstei@quicinc.com>
commit 47346fa611773ef92d12d9145ea33a7f2c79052f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 28 11:33:15 2010 +0300
spi_qsd: Add disable/enable of pclk to suspend/resume functions
Add disable/enable of pclk to suspend/resume functions to improve
power performance.
Change-Id: I871e5ac90a998f2942778bb1e8c2c9d583a9ae00
CRs-fixed: 235046
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a96eba98fbbd21ac657f5d551466909352766ead
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:40:37 2010 +0300
spi_qsd: Making irq code implicit for the core mode in use
Make code clear regarding what mode is in use in the irq.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 6a02d85f8f48cf6f86cddc38c9fce9c1179208b4
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Apr 13 21:16:45 2010 +0300
spi_qsd: Separate tx/rx/error statistics between contexts
To improve SMP safety, separate the tx/error statistics between
contexts. This protects the statistics from accidentally being
access from another context at the same time.
Change-Id: Ibc52406e7b06a4bb5142f8a09a2f35442cb9df8a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 31f301c171aab8e42f8b6abe9b7866412cb546a8
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Mar 23 14:51:00 2010 +0200
spi_qsd: Add better handling for pending transfers during suspend
To improve SMP safety, add better handling in suspend function to wait
for graceful closure of pending transfers. This graceful closure waits
for all the pending transfers to finish or timeout, while not allowing new
ones to queue up. This allows correct handling of all the resources
involved in a transfer before suspend.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 8fbf6e4c5371520b5f9de2001e2ebd15773e918b
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Mar 25 10:44:10 2010 +0200
spi_qsd: Add mutex to get exclusive access to controller registers
To improve SMP safety, add mutex to get exclusive access to controller
registers.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 9405adda67d8c6a856243e599f09d806b4bc6de5
Author: Kenneth Heitke <kheitke@quicinc.com>
Date: Thu Apr 15 16:33:16 2010 -0600
spi_qsd: Move global input_fifo_size to device context.
Fix reference to device data input_fifo_size which is missing from the
previous patch.
Change-Id: Ia469896edd0fd90d7ded2b8ec44f9075474b3ec8
Signed-off-by: Kenneth Heitke <kheitke@quicinc.com>
commit 6031094ca6a940a47437bc6a092e813b4bc41d2a
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:34:48 2010 +0300
spi_qsd: Move global input_fifo_size to device context.
To improve SMP safety move global variable input_fifo_size to device
context.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 97f585033413b1f8ae210bbffd617a4af3462982
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 14 18:35:54 2010 +0300
spi_qsd: Initial contribution of the MSM SPI driver
This adds MSM SPI controller driver. The driver is SPI master, and
allows slave connections. Current version of the driver supports
FIFO and DM modes chosen upon the message size. The driver also
supports loopback mode which can be used for testing purposes.
This is a squashed version of all the MSM SPI driver changes on the QuIC
MSM 2.6.29 kernel which can be found at www.codeaurora.org.
It also contains all relevant adaptations to SPI core changes in 2.6.32
kernel.
https://www.codeaurora.org/gitweb/quic/la/?p=kernel/msm.git;a=blob;f=drivers/spi/spi_qsd.c;h=1c8e3ec727b29040648ef9a4949396f7109528ae;hb=refs/heads/android-msm-2.6.29b
Change-Id: Ibc1e71deb662af87deed77f10dcc8a3a46a8f012
Signed-off-by: Lena Salman <esalman@qualcomm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
- The Trustzone Communicator driver provides interface for userspace
to communicate with TrustZone.
Change-Id: Id0dadacb9997d4a50e88f48ceb03540e1897df93
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Low level TSIF (Transport Stream InterFace) driver
provides in-kernel API to be used by upper layer
drivers;
included also is example for upper layer driver
that uses TSIF API and implements character device.
Signed-off-by: Vladimir Kondratiev <vkondrat@qualcomm.com>
Including:
commit 6bac783fae7e7c5a5bfc95e2cdc9b4f22ca53d44
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Thu Dec 20 18:30:40 2012 +0200
tspp: Disable read-complete interrupt
Read-complete interrupt can be generated from TSPP HW for test
purposes only. It is generated for each TS packet TSPP fetches from
TSIF interface. Having it enabled cause great load of interrupts
that are not used by the SW.
Change-Id: If2038f184a8b0904fba3e1cca5e110fd9daa52d3
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 81cee0596e3cdf8102bf8c8ef45e5f3a07fc8a4d
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Thu Nov 29 14:15:57 2012 +0200
tspp: Improve data-path handling
Existing driver allocated BAM descriptor at fixed sizes each
with interrupt flag set. Notification on data was received when
the descriptor is fully consumed by the HW. The descriptor size
on one hand need to be big enough so that we don't receive too much
interrupts for high-bitrate streams, and on other hand needs
to be small enough so that for low-bitrate stream we are not starved
waiting for data for a long period of time.
The change adds support of allocating small descriptors and set
interrupt flags on part of descriptors. In addition, expiration
timer is used so that if interrupt is not received after long period
of time the timer handler reports back descriptors are already ready
to be consumed. This allows low-rate of interrupts and
handling of low-bitrate streams.
As descriptors are smaller now (size of single TS packet), exposed
API within SW demux that handles a single packet to save the function
call to the API that handles multiple packets for efficiency. Information
regarding the new buffer allocation was added to debugfs.
CRs-Fixed: 420818
Change-Id: I4bb05177774ab0e0bad0737ca1106a0c33f843ae
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 44307d32e23a2bb2a190d88bb049cc34d1e20418
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Sun Nov 25 09:49:51 2012 +0200
misc: tspp: Enable notification of TSIF status and expose it in debugfs
Enable TSIF status interrupt to expose the following
information in debugfs:
- stat_rx_chunks: Counts number of TS packets chunks received from HW.
- stat_overflow: Counts number of times buffer has overflowed.
- stat_lost_sync: Counts number of times TSIF lost sync with input.
- stat_timeout: Counts number of times TSIF reached timeout
waiting for packets.
All counters can read and reset by writing to the respective file.
Change-Id: I475c2c0845c85ac22ea720059fb28c4a588fedcf
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 72b785570b265c6fcb4cb907c0c3a3a4b311f1f1
Author: Liron Kuch <lkuch@codeaurora.org>
Date: Tue Oct 30 17:47:50 2012 +0200
media: dvb: mpq: TSPP output buffer allocation by demux plugin
The TSPP driver can allocate its output buffers internally or
externally. External buffer allocation is required when Demux wishes
to use the ION driver to allocate a physically contiguous buffer
(e.g. to pass to TZ).
This commit improves the TSPP driver support for external buffer
allocation and implements the external memory allocation and free
functions in the Demux driver.
Change-Id: I71da4f18c090ef224c4fc7b23f55b9b3636be996
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>
commit 92705b3eb380826abf8ddefc25a8d210ffa64ff5
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Tue Oct 23 14:15:41 2012 +0200
tspp: Add option to inverse tsif signals
TSIF signals (clock, data, enable and sync) may be configured
to be inversed at TSPP unit input. This is useful in case
TSIF signals from external units need to be inversed.
Change-Id: Idd21948baccedc7499b31ed1d4df0f737538c870
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 435ad8e2157eec5783a435f1e7ec47f67d759882
Author: Joel Nider <jnider@codeaurora.org>
Date: Wed Dec 14 16:53:30 2011 +0200
tspp: add kernel api for video demux component
The demux is an in-kernel software component whose purpose is to take
an incoming TSIF stream and split it into multiple output channels
based on the PID field in each TS packet. Each output channel can be
used for a different purpose, such as audio, video or channel
information. In order to get good performance when moving such large
data streams around, the demux was placed in kernel-space as to
prevent copying memory buffers between kernel-space and user-space, at
least at this early stage in processing the traffic. Originally the
design of the TSPP driver was based on the earlier TSIF driver, so it
contained only a user-space API.
Change-Id: I22799eb19d9049e3635d5c589b02f999d9b8e1c7
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit 6544f3e52c9c1707a5a8fa90d32f89d80dabb4b9
Author: Joel Nider <jnider@codeaurora.org>
Date: Tue Jul 10 13:50:06 2012 +0300
tspp: use new clock preparation functions
Replace the clk_enable() with clk_prepare_enable() and replace
clk_disable() with clk_disable_unprepare() functions.
Change-Id: I63479090eccbeac46f091bf95faeb857139d23a4
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit b9662ca49cfe619e076476dcf8297a4031f0c310
Author: Joel Nider <jnider@codeaurora.org>
Date: Sun Jun 10 14:21:11 2012 +0300
tspp: use device name when getting clock
The new method for requesting clocks requires a driver to pass its
device name for comparison to the list of available clocks.
Change-Id: Ica5b09447de177beead90f8b7c721b84820fbdf7
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit 5556a8524591e4d1c4c9188316551900e8b8382d
Author: Joel Nider <jnider@codeaurora.org>
Date: Sun Oct 16 10:52:13 2011 +0200
misc: tspp: adding TSPP driver files
The TSPP driver manages the transport stream packet processor. This core
is used to offload the main CPU by handling MPEG TS packets, generally
coming from a broadcast modem using the ISDB-T (or variant) protocol.
Change-Id: Ia4c16dcce970ae0f52d8d17957a92fce34ecdb44
Signed-off-by: Joel Nider <jnider@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
QUP (Qualcomm Universal Peripheral engine) hardware provides FIFO
based data path to mini cores like I2C. i2c-qup driver communicates
with the QUP and its FIFOs.
Advantages of this driver include 1-interrupt per FIFO/BLOCK number
of byte unlike 1-interrupt-per-byte of i2c-msm.
Since the QUP hardware communicates with I2C mini core, and this
driver communicates with QUP hardware, driver communicating with
I2C hardware directly (like i2c-msm) can't be used to communicate
with QUP. QUP has FIFO mode and BLOCK mode. FIFO mode can be used
if the data transfer size is less than FIFO size. BLOCK mode should
be used for transfers greater than FIFO size.
FIFO mode is supported in this initial implementation.
Signed-off-by: Sagar Dharia <sdharia@quicinc.com>
Squashed commit of the following:
commit c3fb53893cbc4b5e217ef176010d1b88982a9454
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date: Wed Sep 15 17:16:52 2010 +0200
csdio: Set/get vdd ioctl support
Implement power up/down sequence for internal UBM chip.
This commit includes generic, platform independent part.
CRs-Fixed: 255849
Change-Id: I526c78765ba32b310463a231c5cf578cb37c6deb
Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>
commit e1ba27311fcf3de2a5ca9a3fc1303328720dd120
Author: Nela Gurevich <nelag@codeaurora.org>
Date: Thu Aug 19 14:00:09 2010 +0300
csdio: Move csdio.h to kernel/include
Change-Id: Idf8df750e9f3bcc014d1afa673c9c27c97253195
Signed-off-by: Nela Gurevich <nelag@codeaurora.org>
commit 31d1b09c677c26efb71fa36ff6fe1e7f2d83abbc
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date: Tue Aug 10 13:26:20 2010 +0300
mmc: Char SDIO Device Driver
The Char SDIO Device Driver is an interface which exposes an SDIO
card/function from kernel space as a char device in user space.
Change-Id: If298cdd6d4426b700e69affa5a3602cd221ad89c
Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
