Ensure that when backlight scaling ratio or backlight level is being
changed that the operation execute atomically. This prevents a backlight
level change from being overwritten when it interrupts a backlight scale
update.
CRs-Fixed: 404017
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
(cherry picked from commit ce328861aa1f4fa489e9abfc9d1e02b13af2ba47)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
(cherry picked from commit 0584596f75f8f2b184b8be1a0479ee61e449acba)
Change-Id: Ifb4bd5e823815b51dae38f1b8647b80d21b8ee45
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Calls to clk_set_rate should only change the voltage vote if the clock
is prepared. However, they need to check if the rate is valid even if
the clock is not prepared.
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit c009d9efe966f1f2ac300d43895bb448a9d27cc0)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
(cherry picked from commit 8b5d9d1b3b75cf42df5cf1faeda029ebfbdd308e)
Change-Id: I3a80401dcf76314441ad7624c69433c0ea1d1efe
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Detect the 8064v2 silicon and pass the correct chip ID to KGSL so it
can in turn pass it to the user mode driver to take advantages of
new features and fixes in this silicon revision.
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
(cherry picked from commit 1e52ca565ea24c4bbe939924b30c535a97c4e4c1)
Change-Id: I37608d8ba912f71754fa84c73dae6211b45b890a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The 8064ab chip has adreno 320, which supports 450Mhz.
This patch adds support for it.
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
(cherry picked from commit 7710ee861261f06fc66173f97db81033e2a7b2c9)
Change-Id: Ibcc344b8f4de55040ed9fa28c4ce7fab97d3a147
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Update the call sites of cpu_is_apq8064() to include an
additional check for the APQ8064AB target where
appropriate.
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
(cherry picked from commit 11abd8bdf369e6ddaf5569e780f2c62180095653)
Change-Id: I3cc0ba7279ce6e111d1b87933a8f8251ca306830
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
There is no vcap iommu in the 8960ab platform.
Also, a cleaner separation between platforms is
obtained by re-organizing the gfx3d and vcap
structures by device block instead of by msm.
Signed-off-by: Joel King <joelking@codeaurora.org>
(cherry picked from commit b82921f43be2debbe59738a96fe4332b7b48f6b6)
Change-Id: I044842db17a59f6df1328674a5d65931313dead2
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add the SoC ID and cpu_is wrapper for identifying the
APQ8064AB SoC.
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
(cherry picked from commit b2de509d17aa80c58d531b477956f73071a5840e)
Change-Id: I94608a5530eb267d4ed8215164d07c660ace0d31
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Memory mapped accesses to ETM registers on Krait pass3 cause
intermittent hangs that lock up all the Kraits and their T32
sessions.
This is currently under debug but until this is resolved
error out of ETM probe for Krait pass3.
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Joel King <joelking@codeaurora.org>
(cherry picked from commit 670627c323f1d6a72a35763d6b9dddca18f654df)
Change-Id: I563451964ae5b5afd72423c1a2cec391edc6142e
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add an API for checking whether the current CPU is Krait
Pass 3.
Signed-off-by: Joel King <joelking@codeaurora.org>
(cherry picked from commit 824bd1f08f70d90239538f1c23e50d2178546ec3)
Change-Id: I628b294a6fe8e61fbb6b888cd4848146f2a71a82
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The Krait CPU in the MSM8960AB target requires a slightly
modified sequence to bring the secondary cores out of
reset.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 121f75f4ec8a1cd05688e66d959e55d1c5c2f327)
Change-Id: I5b909ba7980263a9fa2d01846814f9c1ce114400
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Nothing stops a process from hotplugging in a CPU concurrently
with a sys_reboot() call. In such a situation we could have
ipi_cpu_stop() mark a cpu as 'offline' and _cpu_up() ignore the
fact that the CPU is not really offline and call the
CPU_UP_PREPARE notifier. When this happens stop_machine code will
complain that the cpu thread already exists and BUG_ON().
CPU0 CPU1
sys_reboot()
kernel_restart()
machine_restart()
machine_shutdown()
smp_send_stop()
... ipi_cpu_stop()
set_cpu_online(1, false)
local_irq_disable()
while(1)
<PREEMPT>
cpu_up()
_cpu_up()
if (!cpu_online(1))
__cpu_notify(CPU_UP_PREPARE...)
cpu_stop_cpu_callback()
BUG_ON(stopper->thread)
This is easily reproducible by hotplugging in and out in a tight
loop while also rebooting.
Since the CPU is not really offline and hasn't gone through the
proper steps to be marked as such, let's mark the CPU as inactive.
This is just as easily testable as online and avoids any possibility
of _cpu_up() trying to bring the CPU back online when it never was
offline to begin with.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 4a734179d918a4ee42c5fd6d54220eb6dd671ff0)
Change-Id: Id751200d45b58f12bf7d31ae5a7bc2ddd42ef92a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
During the userspace freeze process, a fake signal is sent to userspace
applications. In the case of SMUX CTL, the smux_ctl_poll() will set the
POLLERR flag if a signal is received. This incorrectly unblocks the
userspace application that called poll() and the userspace application
will grab a wakelock before doing additional processing which aborts the
freeze process.
Change smux_ctl_poll() to not set POLLERR if a signal is received.
CRs-Fixed: 402651
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit 3cbcfa3d79564063fc4aa52173feeff101926cb9)
Change-Id: I6c2753b97bd8cf694b75d6fd3713adc99da8b266
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Enabling this feature will allow the use of
PF_WAKE_ON_IDLE, a per task flag that causes that task,
or tasks woken by that task, to wake on an idle CPU if
there is one available. Note that due to the PF_WAKE_ON_IDLE
feature this will not cause a change in behavior for tasks
that do not have the PF_WAKE_ON_IDLE flag set.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit dc6384ce8b9185fc354df3c5622a463da0b60044)
Change-Id: I25963ef54ac3b8f863e2787901f3acb6e4cd2c0d
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
HSIC controller can not detect HSIC device in low power mode. Hence
controller suspend is allowed only when port is enabled. But this
check is done in controller suspend routine. Controller suspend is
attempted after root hub bus is suspended. Even if we fail, controller
suspend, root hub bus remains in suspend state. This would delay
the enumeration of HSIC device as root hub bus resume takes some time.
CRs-Fixed: 396444
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
(cherry picked from commit a723f744025854c7132410fd1699bc0997617fb9)
Change-Id: I30c2117a0a6debfbc98a08610a83b56d5ac75f5b
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
If multiple packets are written quickly and the high watermark is
exceeded, then the -EAGAIN return code is returned (A) and the code is
checked and the tx processing is throttled (B) until a low-watermark
notification is received (C). If the packet queue is
drained and the low-watermark notification is delivered between steps
(A) and (B), then the order of events will be ACB and the tx queue will
be permanently stalled.
To fix this, a spinlock is held to ensure that the sequence is always
either ABC.
CRs-Fixed: 401544
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit cb24b09ebcf924b43e14cfbf78dcc29c98f3a79b)
Change-Id: I729333f7d6cf7f0c1b39518705571b744ee4b924
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Update the base address of the rpm sleep stats to match the address
being used by sleep stats driver on RPM. This change is needed to
allow reading of sleep stats from RPM MSG RAM.
Decrease the size of the MSG RAM for rpm_stats to 256 bytes as it
doesn't take more than that.
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
(cherry picked from commit 660b4e4874c0ab39aae829fc03563f3017d626e2)
Change-Id: Ie6bc059133429ffe75e940aae59fee51a33264b5
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
When a device is waiting on a RPM interrupt prevent RPM assisted power
collapse. Otherwise, the device waiting on RPM completion doesn't get
the completion event until after waking from from idle power collapse.
CRs-fixed: 403816
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
(cherry picked from commit 3ca355ab57126718efb51e96e854773b2e939418)
Change-Id: I11c683a49b4a1a453a2aa58b5c3696e89e3c6be7
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
If multiple packets are written quickly and the high watermark is
exceeded, then the -EAGAIN return code is returned (A), the return code
is checked and the tx processing is throttled (B) until a low-watermark
notification is received (C). If the packet queue is drained and the
low-watermark notification is delivered between steps (A) and (B), then
the order of events will be ACB and the tx queue will be permanently
stalled.
To fix this, a spinlock is held to ensure that the sequence is always
ABC.
CRs-Fixed: 404380
Change-Id: I639eda87e115f592a6465f624e611830e6173852
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit e92b15ff084f1aeb9dec2a722c68f3b05f65fffd)
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit 8d0dda8098216754375e994f90fcd1ef5ef36832)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
In order to remove queue heads(QH) from Asynchronous Schedule Interrupt
on Async Advance(IAA) bit is used in USBCMD as doorbell by ehci driver
to handshake with host controller. When the host controller has evicted
all appropriate cached schedule states, then the host controller will
assert an interrupt which indicates ehci driver that it is safe to
modify a removed queue head from the asynchronous list.
EHCI driver walks through the asynchronous schedule list to search for
the QH(say QH1) which needs to be unlinked from HW. It removes QH1 from
the list, sets ehci->reclaim points to QH1 and starts iaa watchdog timer
after setting IAAD bit in USBCMD register. Before getting IAAD interrupt
for QH1, rest of other interface drives can also issue unlinking of their
QHs which get added to the list of QHs to be removed and pointed by
ehci->reclaim. It is possible that IAAD interrupt gets delayed for more
than current watchdog timeout value. This causes watchdog handler to
finish the unlinking process of QH1 with ehci lock held. Unlinking process
ends by setting QH1's next pointer to NULL, ehci->reclaim pointing to next
QH to be unlinked(say QH2) and calling qh_completions() to retire all the
transfer descriptor associated with QH1. qh_completions() releases
ehci->lock in ehci_urb_done(). There is a possibility of controller
asserting IAAD interrupt during this time on other core. After ehci lock
is released, ehci irq handler gets a chance to acquire ehci lock and
execute which results in premature unlinking of QH2, since ehci->reclaim
now points to QH2. QH2 is not yet removed from the asynchronous list and
ehci driver has not initiated IAAD handshake for QH2. Similarly unlinking
ends for QH2 by setting QH2's next qh pointer to NULL, since QH2 is not yet
removed from asynchronous list, this breaks the list. Due to this racing
between IAAD interrupt and watchdog timer interrupt ehci driver loses
track of which IAAD interrupt triggered for which QH. This results in NULL
pointer dereference while searching for subsequent QHs to be unlinked, in
already broken asynchronous list. Hence increase the IAA watchdog timeout
value from 10ms to a higher value of 100ms. Higher timeout value avoids
the race between IAAD interrupt and IAA watchdog handler and allows IAAD
interrupt to finish the unlinking of QH. Watchdog handler is still be
used to take care of scenarios when controller does not generate IAAD
interrupt for some reason (which is rare, but possible).
CRs-Fixed: 396250
Change-Id: Id1deccf834ca1108121c6533e016b9b3f5fc0ff2
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
(cherry picked from commit 8a657de16d301e1bfab7ba69349446720d4a70e3)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
If the remote modem has queued many small packets in the UART FIFO and
the SMUX client cannot provide receive buffers fast enough, then the
auto flow control command may not get processed before the receive queue
has overflowed. In measured cases, an average of 10 packets are
received after flow control is enabled. In the failure cases, up to 19
packets are received which is more than the max queue size (32 packets)
minus the high watermark (16 packets) which causes an overflow.
Use a bigger retry queue and more aggressive watermark values to make
auto flow control more responsive and to allow more packets to get
queued before an overflow occurs.
CRs-Fixed: 394198
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit 0ab6fc1757ae275a7e29c95588c8470fb787ee2a)
Change-Id: I20817f4dab3360f3c62bd83e74594555571a3a9f
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The debug messages occur very frequently on the ultrasound data
overloading the logs and are meaningless.
Signed-off-by: Baruch Eruchimovitch <baruche@codeaurora.org>
(cherry picked from commit 5f761c04e9fb3948aacb3e57888ce9cfa7190d73)
Change-Id: I6f29874fccf251f9c40e788f87574e0603ff0d43
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add support in the bam_dmux driver to receive the BAM hardware description
data from device tree.
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
(cherry picked from commit 7bf02059a51756514983a76d225b640bc65f2ea4)
Change-Id: I24ef668edca1cf14f6dcdffa0340a036c3900482
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The write_val argument was not specified as an input
on the asm instruction. The compiler thought it wasn't used,
even though the asm instruction does use r0, which
is how write_val is passed into the function. The compiler
would optimise out the argument being passed into
the function.
Add write_val as an input operand to prevent it being
optimised out.
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
(cherry picked from commit e1bb10a173de0327171c2c8d16f64af34a5ca937)
Change-Id: I478f79a1a34a4ee15516a1765f8c6094191454fd
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Increase log buffer size to handle the maximum possible log line size.
This prevents passing in a negative buffer size to sprintf() which is
handled gracefully, but generates a warning message in the kernel log.
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
(cherry picked from commit acd4c77f0311b42a49d254d5308397fd0a39277a)
Change-Id: I6b78092d0dc687184c9a12203441085382fd5c1a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The check for permitted modes was incorrect.
This resulted in the modes not being set during init.
Fix this by correctly checking for permitted modes.
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
(cherry picked from commit fa8dff79273fe23ba461124fa8184183ee822817)
Change-Id: I88ff47326a4ca04d55b2747d2d68fa84ae8fb844
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
bitmap_find_next_zero_area_off requires everything to be given in terms
of bits. genpool no longer keeps track of everything in terms of bits
so the start address must be shifted before passing to
bitmap_find_next_zero_area_off. Without this, if the start address
is unaligned, the code will not take this into account.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
(cherry picked from commit e8e5365f74e311f5e0dd2513d3321d081355d308)
Change-Id: I5eca13f181d50e6f9f8f39c7440c6619a8edc69a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Support to transfer 64K bytes in a single SPI
transfer in DMA mode on targets which support
16 bits in QUP_MX_OUTPUT_CNT register. Earlier
if the application sends more than 4K data it is
split up in to 4K chunks, irrespective of the size
of the QUP_MX_OUTPUT_CNT register.
CRs-Fixed: 383120
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
(cherry picked from commit c5fbd7f2dccf52e95e6c1504a28b19d1dc622028)
Change-Id: Idb27c651e0a81a4efe363feabc44e26c5b61fb0f
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The wcd9xxx codec requires reset gpio to be active at boot time so that
reset is held while regulators are enabled.
The reset signal is active low. Configure gpio to level low.
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
(cherry picked from commit 187e9cbc9a886af94b9e13e6acf6a5d54e319b34)
Conflicts:
arch/arm/mach-msm/board-8064-pmic.c
arch/arm/mach-msm/board-8974-gpiomux.c
Change-Id: Ia2fcfa85565de2a00dabedae5b4a175de6a6a678
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Adds support for codec config flag to be passed
to driver. This flag indicates that the buffer
associated contains codec specific data.
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
(cherry picked from commit f4bd6a3fbdb5d70b7000cdceb811557876bb7953)
Change-Id: Ib832872717adbc46bd186aa268eaa9cfa402313b
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The wcd9k codec hardware's reset is held since system boots to make sure
hardware is in reset during enabling regulators.
But current codec driver toggles reset which results in resetting twice.
Fix reset sequence so hardware can get reset only once.
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
(cherry picked from commit fdf4751fb7f599070d5e10f84ea232b3b648a9b5)
Change-Id: I2be857ef8d702aecff2427da3c75ad57d2040299
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
During tsif stress tests it was reported that the dma flush caused by
calling action_close() is sometimes unrecoverable. The root cause is
stopping the tsif while a read by the dma of the tsif FIFO is in
progress. The previous workaround relied on closing the tsif GPIOs
to stop incoming data to the tsif, then add a delay to allow the
dma to complete all outstanding transactions. A customer still reported
seeing the dma issue. The reason the issue was still happening is due to
the call of gpio API (request/free) which was done on pins not configured
to act as GPIOs. Doing so caused tsif interface not to be closed properly.
Per gpio-mux documentation, pins with function configured as non-gpio
may suffer from un-expected behavior when calling gpio API, these calls
were removed. The delay after closing tsif interface was enlarged to better
cope with low bitrate streams.
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
(cherry picked from commit b18fac5fe2c45d24bcac2bcd3db9bceb98317909)
Change-Id: I5115d9cd51bac5a7cd5200731c5dd4eb0d4fc352
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Enable interactive governor in config to enable the analysis
of system usecases with interactive governor.
Signed-off-by: Narayanan Gopalakrishnan <nargop@codeaurora.org>
(cherry picked from commit 17822bc5884df7b03282304e5d142f58df34c745)
Change-Id: I85216a23f9d41fe50eb3aeab1595261481cb6b7a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
8960 v1 with the defective v1 riva hardware is no longer supported. This
makes the workaround code in SMD dead code that is never used.
This reverts afb8c4a9b88e8792d8915f69c236ee07b86e7220 and
afb8c4a9b88e8792d8915f69c236ee07b86e7220
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
(cherry picked from commit d61033793a667499abb80f9ed452c6b1ed36df76)
Change-Id: Icd8f700d6a793b718652b27ef8d552c9e891d7a4
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
When resource allocation fails during mp3 playback, a crash
is observed. When such failure occurs, the driver tries to
access a handle that was never initialized. This is due
to missing flag check to determine whether there was any
memory allocation or not prior to failure. Added flag in error
cases to avoid such issues.
CRs-Fixed: 394671
Signed-off-by: Chaithanya Krishna Bacharaju <chaithan@codeaurora.org>
(cherry picked from commit d098938af6a47eaa6efa48b1285136de172a7709)
Change-Id: I7606f6e8261f75d85d8d1175217a9fa2d1a5cd0a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
ION allocations in SYSTEM_HEAP now uses alloc_pages() and not
vmalloc(). This will add one entry into sg_table for each page
of allocation. With this, sg_table may over-cross the limit
of fitting into one page for bigger sized allocations. So,
accommodate extended sg_table entries by chaining more pages.
ARCH_HAS_SG_CHAIN will enable this chain of pages. Enable
ARM_HAS_SG_CHAIN to select ARCH_HAS_SG_CHAIN.
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
(cherry picked from commit 3544e745fe4bce64103efbae82c8d6490ff25a94)
Change-Id: Ie43fef5d2a88aedbbb324b60ca39ea594a0a069e
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The class H controller is embedded in the digital hardware.
Its purpose is to analyze the signal which will be sent to
the PAs (EAR or HPHL/HPHR) to adjust the supply voltage of
the PA to make the system as efficient as possible.
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
(cherry picked from commit 4c56c594c16b5f730af3538829cae4e102ac17f5)
Change-Id: I5c269a917427cef918e06eb4599383fd725c3a92
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Currently UART port is enumerating with platform device ID. It is not
necessary that TTY<ID> is same as available UART device ID. Provide
optional support which allows to override used platform device ID with
uart port by userid to get TTY based Uart device as /dev/ttyHS<userid>
instead of /dev/ttyHS<ID>.This support helps third party application/test
framework to use the same TTY uart device name across different platform
without changing in those applications as it is not necessary that on
different platform used UART device would be having same TTY<ID> name.
The userid value should be from 0 to 256
CRs-Fixed: 386736
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
(cherry picked from commit 51690e5e8c2d6199a0e1162aa2c0317a2c6a9f89)
Change-Id: I3d9546ceab48345d0e3456c6223e3ff82e5a2f8b
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
JPEGTASK is receiving MOD_READY event after it is disabled
which is not expected. When JPEGTASK enable fails with
ETIMEDOUT error, this module is disabled immediately.
But MOD_READY event for this module is sent by RPC to
Apps ADSP Driver even after it is disabled. Ignore this
event incase module state is not in ENABLING state.
CRs-Fixed: 395420
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
(cherry picked from commit d8aa19223074d2470a9f4b12a472ea74a82138c0)
Change-Id: I58cc97fc5ed6896c15de2c8880a726e375010c65
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Define logical id for display backend processing.
These ids are independent with hw implementation, could be used
for MDP4, MDP5 and future ASICs. Kernel driver implementation will
also be abstracted to the post processing user.
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
(cherry picked from commit 6a431631728d2d217447079dd636bd1e26d56ac4)
Change-Id: I27bd4e7d3803f4b356d924c65ac28e142375d1d5
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
This function is exported in blk-core.c to be used in other modules
but it's definition in h file is missing.
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit 87c7500d26ddddf2851bbe65190f5d8970b0346d)
Change-Id: I94a1603c345db9a92237ff6696bf29e6afbe69b7
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add the DTS file for the MSM9625 RUMI and make the original DTS file
to a DTS include file.
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
(cherry picked from commit fb9d9a571c206ee77434d4c34ddec387655a39ca)
Change-Id: Id379c6ceb64c72b5e3fdb776eb45d45bb1539fdb
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Move the voltage calls to a sleepable context so we can avoid
spinning for hundreds of microseconds with interrupts disabled
waiting for a regulator to increase. This change also paves the
way to making the clock driver into a real regulator consumer
that uses the proper regulator APIs instead of the MSM specific
rpm_vreg API.
Doing this also requires us to make clk_set_rate() a sleeping
call so that concurrent clk_prepare() and clk_set_rate() calls
are synchronized. Making clk_set_rate() sleepable also
necessitates moving the clk_set_rate() call in clock-voter.c to a
sleepable context. Do that by having clock-voter aggregate and
update the rate in prepare/unprepare instead of enable/disable
(note that enable/disable of voter clocks implicitly calls
enable/disable on the parent via generic clock code).
Now that clk_set_rate() is sleeping, call clk_prepare() and
clk_unprepare() in the clock-local code when a rate change
requires reparenting the clock. This cleans up a problem we have
where sources may be left unprepared by a clock rate switch
(hence the default true warned flag for PLLs and crystals).
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit d86d1f2d968f194e3db46bb683e370a9fa3a6037)
Conflicts:
arch/arm/mach-msm/clock-local2.c
Change-Id: Ie5bbb17537d5b33de92f8ea1c2da6070b18c14f1
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
During HSIC probe driver registers the level triggered interrupt
on wakeup gpio. Wakeup irq line is disabled based on the return
status of interrupt registration. There is a possibility that
wakeup gpio is already pulled high after registering the interrupt
which can cause wakeup interrupts to be fired on continuously
without getting chance to disable the irq line. Hence do not
enable wake up interrupt on request irq.
CRs-Fixed: 394540
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
(cherry picked from commit bbcdcbc3f09cc90d4b8fdd607244c3d73c9ae801)
Conflicts:
drivers/usb/host/ehci-msm-hsic.c
Change-Id: I9b20d54d919333d11201d30513b4111f3fb31df3
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Change the chunk allocation from kmalloc to vmalloc for
allocations greater than a page. This allows large
chunks to be allocated from physically non-contiguous
memory and increases the chance of the allocation
succeeding.
CRs-fixed: 387655
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
(cherry picked from commit e461457b134e55c3ca68b91b70b8796e3f3dba69)
Change-Id: I576fed3dd33fdfa9742f0c91bea72417c4f0086f
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The subsystem framework works fine without a restart_order for a
particular machine. Therefore, always return success if there are
no restart orders. This allows 8974 to start using the subsystem
restart framework while we work on removing the need for the
restart order list.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 973b3ef7f54569a777ebb5d49fdd02ff155b62b0)
Change-Id: I054f2c90598889bb3de042296f96c4e09d5a1589
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Added only important gpiomux entries need for initial booting.
Signed-off-by: Ravi Kumar V <kumarrav@codeaurora.org>
(cherry picked from commit 345872adaa25ca6c5fb7e94e46591d2bdf56ec83)
Conflicts:
arch/arm/mach-msm/include/mach/board.h
Change-Id: Id623d68106eddc8a20182af5bca590608f458920
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Abort any uplonk wakeups that happen to occur in the middle of subsystem
restart. This may occur as a small race condition window exists where
bam_dmux knows SSR has occured, but hadn't yet sent that info to the
clients. During this small window, a client may try to send some data,
triggering a ul_wakeup()
CRs-Fixed: 392604
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
(cherry picked from commit 00424ff7ef1b7ca6ddb0499a559d1693f6ae5c6a)
Change-Id: Iabdc89528fd7a20eee56c96a3dfbe3b5fc1bf514
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
