Starting with B family chips, the IOMMU client is responsible
for registering a domain (page table) and attaching it with
the corresponding device context when required.
Signed-off-by: Ankit Premrajka <ankitp@codeaurora.org>
Conflicts:
include/media/videobuf2-msm-mem.h
Change-Id: I2105f3cdd94a5e42c09a46e32ed615a35615485d
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Starting with B family chips, the IOMMU client is responsible
for registering a domain (page table) and attaching it with
the corresponding device context when required.
Signed-off-by: Ankit Premrajka <ankitp@codeaurora.org>
Conflicts:
include/media/videobuf2-msm-mem.h
Change-Id: I98f97805a67d597da55780f8c6739c9734a19a14
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The version of packing support excepted by the linux community is
slightly different from the one that was merged. This revert is needed
in order to upload the latest version from the linux community.
This patch reverts the following commits:
1.mmc: card: Add eMMC4.5 write packed commands unit-tests
2.mmc: card: Fix packing control enabling algorithm
3.mmc: block: Add MMC write packing statistics
4.mmc: msm_sdcc: enable the write packing control
5.mmc: msm_sdcc: Enable write packing capability
6.mmc: block: Add write packing control
7.mmc: core: Support packed write command for eMMC4.5 device
8.mmc: core: Add packed command feature of eMMC4.5
(cherry picked from commit f94cf3da103b344b13fa4d6665fd21dad1b95ead)
Change-Id: I2efc6dc8d8f6d5cc7e9efa99ec74914ffff96fcd
commit: 9b54d88c6a11ebfe069b7fdebcb521da21754c3f
commit: e2ecb58a6c5011549aac3e86fb1c13e7b7c65104
commit: e544d700e2dac1584a8172c4dc347d81ede203bd
commit: 8afe8d2a98a1bbf3804162ff5c95a56226935f5a
commit: 25e2261a556c4393f79d58bce814bb3df34b9549
commit: 63c61d6d8b8f37c71b4162b3affffdf72ac06811
commit: 968c774ea6466fa7adbf2eac333220132acda306
commit: 516994eee39282b8648b509e449ff83b49833209.
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit 31fe84d6edae65f9df5663538e528697897be86e)
Signed-off-by: Maya Erez <merez@codeaurora.org>
Set MMC_CAP2_INIT_BKOPS. This will set the BKOPS_EN bit in the
ext_csd register. The BKOPS_EN bit is one time programmable.
(cherry picked from commit b7f382b25fbd363c43af2332b4ff490e13aab6e4)
Change-Id: Ie913561b2b82ff28366ffe564ffcafe8fc19a96a
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit 2d29e0d34e3304d976291d3ab29c7c893c12d740)
If the card and the host support BKOPS, and BKOPS is not enabled
yet, set the BKOPS_EN bit to enable BKOPS.
This bit is one time programmable.
(cherry picked from commit e966c1ca32d118b26ca6e26267f0c13c9c0e0052)
Change-Id: I2b97898857bed676021fe56a6f6e49762cf609fa
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit 5ebe331e59e9c30bffead8e3030e3581ee699895)
Enable eMMC background operations (BKOPS) feature.
If URGENT_BKOPS is set after a response, note that BKOPS are required.
Immediately run BKOPS if required. Read/write operations should be
requested during BKOPS(LEVEL-1), then issue HPI to interrupt the
ongoing BKOPS and service the foreground operation.
(This patch only controls the LEVEL2/3.)
When repeating the writing 1GB data, at a certain time, performance is
decreased. At that time, card triggers the Level-3 or Level-2. After
running bkops, performance is recovered.
Future considerations:
* Check BKOPS_LEVEL=1 and start BKOPS in a preventive manner.
* Interrupt ongoing BKOPS before powering off the card.
* How do we get BKOPS_STATUS value (periodically send ext_csd command)?
* If using periodic bkops, also consider runtime_pm control.
(cherry picked from commit 6807769f7bf68984a5aeda4b9b521f1167cbaf00)
[merez@codeaurora.org: core.c: release_host when stopping BKOPs for
non SDIO cards in suspend]
(cherry picked from commit c1a56a1247341d13af7c8f84d5ac1211a3c4b376)
Change-Id: I5ac2ac909222e2b4e94cd97ce7da79f4488f06f0
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Reviewed-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit 653abe2434532e4d2886d27dfdc3f42ae1c7ade1)
A newer version of BKOps should be picked from the community.
Therefore the old support is reverted.
Revert the following commits:
9db69fca22bd2970f6b14b50cf8533a1edb64364
8ac659eb3d96e31b8bb6b8d09143ddd6eb83ae19
f886c80ee2f4c29aeaab2d76c9303c00263bb428
(cherry picked from commit 3402d2b725a5af16bc62a2e788913a46d3f7e54a)
Change-Id: I5df105753bef7ee10215526006187673b85bb0c1
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit b5763af04035cd5e3264225f40270d175985adc5)
This reverts commit 304d9f5172c8c0210e2e29b175e8f68ea8257f69.
low power mode changes are causing issues like,delay in reponse to
touch , and controller is not recognizing the touch events as its
scan rate is also low in low power mode state . since controller is
not recognizing the touch in low power mode state , so only way
for the controller to come out of low power mode is to do multi-touch
and controller responds randomly to one of the touches and comes out
of the low power mode.
Signed-off-by: Sreenivasulu Chalam Charla <sreeniva@codeaurora.org>
Change-Id: I35e0797f819cfbce6630d70af443b96546eacfb5
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
There are situations when we observe that charging is in progress
but the end of charge (EOC) worker is not running. This leads to
problems like
-never detecting end of charge
-not adjusting vddmax
-not preventing suspend while charging.
The reason is that the bootloader could have started charging already,
causing a fastchg interrupt to not happen. If the fastchg interrupt is
missed the driver will never start EOC worker.
Check the real time status of the fastchg interrupt and if it is fast
charging invoke the handler so that the eoc worker could be
started.
(cherry picked from commit 7f1d97fd69c3afe66577e731105207e5db544ab2)
CRs-Fixed: 393301
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Change-Id: I5c0ba3b8f0653c5f9d64f35346601763c059505a
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Certain ADB commands like "adb usb" and "adb root" restart the
adb daemon running on the device. These commands require USB
bus reset, otherwise adb commands on the host side would stuck
for ever.
USB bus reset can be forced from device side by re-enabling the
same composition. Earlier, configuration is disabled when adb
daemon closes /dev/android_usb device file. The configuration
is enabled again after adb daemon opens the device file. This
approach solves the "adb usb" problem with the below side effects.
1. When USB cable is disconnected, the Rx request is flushed and
an error code is returned to user space. The adb daemon is simply
restarted in this case which cause an unnecessary rebinding of
all functions.
2. The above scenario can happen if host reset the bus when device
is in configured state. If device disable pull-up during, bus
reset, USB CV CH9 test cases are failing.
The commit d9b1897 (USB: android: Avoid re-enabling the same
configuration) fixed the above side effects. But silently ignores the
original "adb usb" problem.
This commit is another attempt to solve all the above mentioned problems
by forcing re-enumeration only when device is in connected state. That
means, "adb usb" and "adb root" commands force usb bus reset where as
plugging out a cable does not.
(cherry picked from commit 1aa235a6c0a3d67bff24609766baf5a7d5d8e3e4)
(cherry picked from commit 81fefe664ab6333f05209bed959a599a47baf71f)
Change-Id: Id3a40f62dd51aba6ec690d3326ed67ced32b946a
CRs-Fixed: 407882
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
while queueing requests to USB HW, waiting till EP PRIME bit
get cleared after setting it leads to wathdog timeout. Fix
this by implementing timer based solution instead of infinite
PRIME check loop.
(cherry picked from commit 9e4a5053b0f25cb18ed394fa517be620db673d44)
(cherry picked from commit dcfe03cd167f1b4916de85ce0a0a5516191741cc)
CRs-Fixed: 397907
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Change-Id: Iad7504c77c02870d9fa3b7b9decf13afcf2c9e12
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Due to higher HSIC interrupt threshold value, sometimes
driver is running short of enough rx urbs queued to HSIC
HW to receive IP packets from mdm device. In this case
driver is busy processing large number of completed rx
urbs and left with fewer pending urbs with HW. This causes
occasional throughput drops on rx data path. Hence increase
number of rx urb from 50 to 100, to keep HSIC HW busy in
pulling data from mdm device while completed urbs are getting
processed.
(cherry picked from commit e8f691f60db39b50951148c3e68ae35c89cdd397)
CRs-Fixed: 397809
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Change-Id: I590c203551c5ac83a71b8628d195f2a15840edf1
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Add necessary functions for AR6004 to control BT related GPIO.
This change will only be used by AR6004
(cherry picked from commit 9baad179a8a7996e1912de14eb6f02f17c932e03)
(cherry picked from commit 493557fce821ae201b4cc3c6a125d703ac5de60e)
Signed-off-by: Ming-yi Lin <mylin@codeaurora.org>
Change-Id: I0fb3a59761dc3e994254bdc0241281e4bbcdf402
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Toggle the CHG_USB_SUSPEND bit when utilizing the VBUS boost.
This bit controls ensures that no current is being drawn from
a USB device and the charger runs off the battery.
This makes sure that when pm8921_disable_source_current is called
the correct setting is written to the suspend bit depending
on the disable flag.
(cherry picked from commit d8878596b9b19668fd1f1b226a333d955f2218c4)
CRs-Fixed: 393498
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Change-Id: Iae390fd10e59d6ba1fe85743c1015eea35b06f7a
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
ID ground interrupt processing and system suspend can run in parallel.
When Id is grounded, USB is brought out of low power mode(LPM) and state
machine work is run to activate host mode. While waiting for the VBUS
valid event, device suspend callback is executed from system suspend
context. The current code put USB in LPM, without activating host mode
completely. Abort suspend when A_BUS_REQ is asserted which indicate
that host mode is active.
(cherry picked from commit cfe0539e389c52ec6c4d99cf1915d806d42f1abe)
CRs-Fixed: 412841
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Change-Id: I9ecd4f55a328d63ddbf0e415a9bcff1158874203
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Currently parity bits are defined to be used with UART_DM_MR2
register with PARITY_MODE Bit as below :
EVEN_PARTIY = 1 and ODD_PARITY = 2
With these values, UART functionality doesn't work after enabling parity.
Hence adding correct used PARITY_MODE bits value as
EVEN_PARITY = 2 and ODD_PARITY = 1
after confirming with UART hardware programming guide.
CRs-Fixed: 410377
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
(cherry picked from commit fd40e5f6313fbc74e8897927be1004faa5d9df08)
Change-Id: I56f1a46ab56a7976ad00fc1329ad766b1182cb4e
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Power key could be in pressed state during boot. Set the flag
to track the press status properly by reading press irq status.
(cherry picked from commit bd38250554df6e70657e6ff42ad63415dbd53f1a)
CRs-fixed: 404018
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Change-Id: I1b604b63e53803483d3cc2a7bae0a5e7ed98285b
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Currently, RMNET will restart the TX queue after receiving a
low-watermark notification from SMUX. This just clears the XOFF bit,
but does not reschedule the TX thread in the Linux TCP/IP stack. This
means that the next TX operation will not take place until the thread is
scheduled by some other means which may take up to 5 seconds.
Instead, wake the queue which clears the XOFF bit and schedules the TX
thread to allow transmission to continue immediately.
(cherry picked from commit 4d8fb2ecb3a9cdab3e9d605280256c6b46773dd0)
CRs-Fixed: 412758
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Change-Id: I1f169547f3ff518baada632d5a3f766b5795c697
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
In one corner case, the SD card is stuck in a bad state with its DAT0
line pulled low, and SDCC is waiting on the interrupt when the line
goes back high. But due its bad state eventually the SD card is removed
from the system.
Later during re-scanning of the devices, the SD card is power-cycled and
added to the system. But now the pending interrupts for SD card is
received as the interrupt MASK register (MCI_MASK0) was not cleared.
To prevent such cases reset the interrupt MASK register (MCI_MASK0) while
powering off to prevent any pending interrupts after power-cycle.
(cherry picked from commit a3f8f793b21782c79a9fcc5f7aa1cc27fcbf246e)
CRs-Fixed: 396706
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Change-Id: Idfae18895abf47769328b0a768f83eba2ef573f7
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Setting DDR timing mode in controller before setting the clock
rate will make sure that card don't see the double clock rate
even for very small amount duration. Some eMMC cards seems to lock
up if they see clock frequency > 52MHz.
(cherry picked from commit 2877d919135791d5223a9ba94b2cfc9ba50bc3df)
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Change-Id: I7a4ace461e2def6d53863db4b768ec7e497b3095
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
In the usb_ma_table there exist two consecutive values
that have IUSB_FINE_RES bit set. Some functions
incorrectly assume that this does not happen.
Fix this by checking for consecutive values having
IUSB_FINE_IRES bit set.
(cherry picked from commit 67ebde08e12d246302d133b4510d59c8f96325d1)
CRs-Fixed: 404348
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Change-Id: I6b6ca96b92ec4b9765e4812352057a0ac8cff380
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Currently, hash (SHA1/256/hmac) operation occasionally results
in an incorrect hash value. This is due to the premature reading
of the AUTH_IV register done before the last SHA block is processed.
There needs to be enough delay (wait states) before the AUTH_IV
register is read to extract the hash value.
The current implementation has 2 wait states. Adding 2 more wait states
for hash operations, resolves the issue.
The wait states are calculated based on the inputs from the hardware
team with regards to the time taken to process the last block of 16
bytes of the data packet.
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Change-Id: I82936441429560e41f25a98994d49a0113eb8de2
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
The A330 GPU defines a few new registers that don't exist on
A305/A320. Define a new subset for A330 and dump it in the
postmortem and binary snapshot.
Change-Id: Ic0dedbadd0c44ee8872b99fd6b0b3dc8eb972eea
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Expand the snapshot register dump helper function to support multiple
sets of registers. This will be useful for derivative GPUS that
use a global subset of registers and add a few new ones. This will
not be useful for chipsets that have extensive changes to existing
registers.
Change-Id: Ic0dedbad05bcc3b5a3a0cc933659959965ff5817
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
The CP MERCIU queue can be read from the A330 GPU. Dump it into
the snapshot binary.
Change-Id: Ic0dedbadf2c61ccec6a11af103374f4aee8be727
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
The A330 has a larger ROQ buffer then the A305/A320 variants so
adjust the size at runtime based on the core type.
Change-Id: Ic0dedbade62c988cfe402876bc94d91a2dd71617
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Create adreno_is_a330() to identify the GPU for A330 specific
register settings and core specific code.
Change-Id: Ic0dedbade244ffba3ba3917661a88f97108e6182
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Increase number of clocks that RBBM will wait before de-asserting
the Register Clock Active signal. This fixes kernel panics during
stability tests on multiple devices
Change-Id: I6f7f8bb17cfd9c5beed0fd21d56ab6ab9fd40195
Signed-off-by: Rammohan Basavaraju <rammoh@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
For A3xx, initialize UCHE_CACHE_MODE_CONTROL_REG to
0x00000001 so that UCHE will always use 64-byte
cachelines when we boot up or reset. This value
increases performance and was previously set in the
graphics preambles, but should instead be set at
boot/reset time.
Change-Id: Iec71ffc04262ac43534fd632d8b092a48d280509
Signed-off-by: Kevin Matlage <kmatlage@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
GPU register RB_GMEM_BASE_ADDR needs to be initialized with GMEM base
address. From A330, OCMEM is utilized to be GMEM dynamically; when
OCMEM is allocated for GFX, the allocated region address may vary
every time, GPU register RB_GMEM_BASE_ADDR need to be initialized
with the allocated OCMEM region address.
Change-Id: I5cb4472a9f18759d2af160a15d83f1404378a530
Signed-off-by: liu zhong <zhongl@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
No need to save a context if it is being destroyed since
it will no longer be used at all. This is better for
performance and also avoids the use of legacy kgsl
context save code for contexts that use preambles
Change-Id: I19a64e82188b4132f353bb61c21e4ed2281092fc
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Define the register offsets for IOMMU-v2 and switch off using per
process pagetables for IOMMU-v2.
Change-Id: I8b76de557c8e52b5a2a333ceb987bd743b213eb7
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Changed values written to VBIF registers for A330.
The maximum pending request from clients is increased to 24.
Disable VBIF clock gating. This potentially increases stand-by power.
Change-Id: Ic9a4f15546f4122298e140e79e4572c82e6385fc
Signed-off-by: Lokesh Batra <lbatra@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Define the IOMMU register offsets in a structure array. This
offers flexibility in defining IOMMU v2 offsets in another array
and the right array to be used can be setup during MMU
initialization.
Also, restrict the usage of IOMMU offsets only in the iommu file
by redifining the functions that return iommu information. Remove
the function to get iommu mapped register address and replace
it with a function that returns the gpuaddress of given iommu
register. Only return the valid address bits of an iommu pagetable
instead of just returning the pagetable base register value.
Change-Id: Ib88e605f57e551c7b84029647451cb20f06025a0
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Calling clk_set_rate() for both AXI & 2D core clocks without putting
them in async mode causes 2D core hang. Since AXI & 2D core clocks
are in sync mode, ensure that clk_set_rate() is called only for AXI
& 2D core clock is enabled only after it is prepared.
Change-Id: I4634e2342d62ce16ad7afc748b10b0573fbfd913
CRs-fixed: 385393
Signed-off-by: Ranjhith Kalisamy <ranjhith@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Turn io_fraction to 100 so that the kernel
wait_io_interruptible call is not required for io_busy
reporting while using msm policy. Msm policy uses its
own schema to capture busy events.
Change-Id: Iddb63552305974ce4a12446117f27d07b7201387
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Turn on an additional clock for IOMMU if it is valid. This additional
clock is present on devices which have the IOMMU unit access tied to
the core clock of another component. This has been introduced from
IOMMU-v2 onwards.
Change-Id: I8b0a0f23cb789d820a8d515cae54b44f556e634d
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Set the upper limit for the gpu address that the MMU can access to
be the base address where the first IOMMU units register space
is mapped. Earlier we set it to the last address mapped minus
a PAGE_SIZE, but we can actually set it to the base address of the
first mapped unit since the GPU should never access that space
unless we are updating IOMMU registers.
Change-Id: I6507ee373a9218210c148685e443e948a311bd29
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Limit the size of individual GPU memory allocations to the amount of
free memory on the system minus 32MB. This early check gives us the
chance to verify that the user didn't ask for an obscene amount of
memory, and also to limit the chance that an allocation attempt will
invoke the OOM killer.
The 32MB buffer in particular should keep us out of the clutches of
the OOM killer. That number is the same amount of buffer used in
the page allocation alogrithms and it should keep the GPU from further
throwing fuel on the fire of a low memory situation.
Change-Id: Ic0dedbadcc5ee9cc0d77056b1a22eed5c385d636
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Instead of calling BUG_ON if the user passes a zero length via
IOCTL_KGSL_GPUMEM_ALLOC to kgsl_sharedmem_alloc_user, return
-EINVAL instead and propegate the error back up to the user.
CRs-fixed: 389886
Change-Id: Ic0dedbad2dc1f68ad1d3227498893c73c2a1c59e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
