msm: camera: Fix for Concurrent camera bus overflow
Change-Id: I78ebd490f3b74eef63278d48b48602993bfb6ae1 Signed-off-By: Sagar Gore <csgore@codeaurora.org> (cherry picked from commit 5af68060348859ca8b40b90d930b6d323356f06d)
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@@ -547,6 +547,7 @@ static int32_t msm_actuator_i2c_probe(
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if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
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pr_err("i2c_check_functionality failed\n");
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rc = -EFAULT;
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goto probe_failure;
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}
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@@ -1019,6 +1019,7 @@ static void vfe32_set_default_reg_values(
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CDBG("%s: Use bayer stats = %d\n", __func__,
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vfe32_use_bayer_stats(vfe32_ctrl));
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if (!vfe32_use_bayer_stats(vfe32_ctrl)) {
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#if 0
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msm_camera_io_w(0x3980007,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_AEC_BG_UB_CFG);
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@@ -1037,6 +1038,23 @@ static void vfe32_set_default_reg_values(
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msm_camera_io_w(0x3E0001F,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_HIST_UB_CFG);
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#else //PIP roll-off changes
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msm_camera_io_w(0x3C00007,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_AEC_BG_UB_CFG);
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msm_camera_io_w(0x3C8000F,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_AWB_UB_CFG);
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msm_camera_io_w(0x3D80007,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_RS_UB_CFG);
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msm_camera_io_w(0x3E0001F,
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vfe32_ctrl->share_ctrl->vfebase +
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VFE_BUS_STATS_HIST_UB_CFG);
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#endif
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} else {
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msm_camera_io_w(0x350001F,
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vfe32_ctrl->share_ctrl->vfebase +
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@@ -5677,8 +5695,9 @@ static int msm_axi_subdev_s_crystal_freq(struct v4l2_subdev *sd,
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int rc = 0;
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int round_rate;
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struct axi_ctrl_t *axi_ctrl = v4l2_get_subdevdata(sd);
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if(axi_ctrl->share_ctrl->dual_enabled){
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CDBG("%s Dual camera Enabled hence returning without clock change\n", __func__);
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if (axi_ctrl->share_ctrl->dual_enabled) {
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CDBG("%s Dual camera Enabled hence returning "\
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"without clock change\n", __func__);
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return rc;
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}
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round_rate = clk_round_rate(axi_ctrl->vfe_clk[0], freq);
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@@ -5767,11 +5786,11 @@ int msm_axi_subdev_init(struct v4l2_subdev *sd,
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CDBG("%s: axi_ctrl->share_ctrl->dual_enabled ? = %d\n", __func__,
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axi_ctrl->share_ctrl->dual_enabled);
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if (axi_ctrl->share_ctrl->dual_enabled){
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pr_info("%s: Scaling bus config for dual bus vectors\n", __func__);
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pr_info("%s: Scaling bus config for dual bus vectors\n",
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__func__);
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msm_camio_bus_scale_cfg(
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mctl->sdata->pdata->cam_bus_scale_table, S_DUAL);
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}
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else
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} else
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msm_camio_bus_scale_cfg(
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mctl->sdata->pdata->cam_bus_scale_table, S_PREVIEW);
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@@ -6775,25 +6794,23 @@ static void msm_axi_process_irq(struct v4l2_subdev *sd, void *arg)
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if (axi_ctrl->share_ctrl->comp_output_mode &
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VFE32_OUTPUT_MODE_TERTIARY1) {
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CDBG("VFE32_OUTPUT_MODE_TERTIARY1\n");
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#if 0
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if (irqstatus & (0x1 << (axi_ctrl->share_ctrl->outpath.out2.ch0
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+ VFE_WM_OFFSET)))
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vfe32_process_output_path_irq_rdi0(axi_ctrl);
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#endif
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+ VFE_WM_OFFSET))) {
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CDBG("VFE32_OUTPUT_MODE_TERTIARY1\n");
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/*vfe32_process_output_path_irq_rdi0(axi_ctrl);*/
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}
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}
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if (axi_ctrl->share_ctrl->comp_output_mode &
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VFE32_OUTPUT_MODE_TERTIARY2){
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CDBG("VFE32_OUTPUT_MODE_TERTIARY2\n");
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#if 0
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if (irqstatus & (0x1 << (axi_ctrl->share_ctrl->outpath.out3.ch0
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+ VFE_WM_OFFSET)))
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vfe32_process_output_path_irq_rdi1(axi_ctrl);
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#endif
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+ VFE_WM_OFFSET))) {
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CDBG("VFE32_OUTPUT_MODE_TERTIARY2\n");
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/*vfe32_process_output_path_irq_rdi1(axi_ctrl);*/
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}
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}
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if (axi_ctrl->share_ctrl->comp_output_mode &
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VFE32_OUTPUT_MODE_TERTIARY3){
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pr_err("Before process output path" \
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VFE32_OUTPUT_MODE_TERTIARY3) {
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CDBG("Before process output path" \
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"of RDI2 irqstatus %x\n", irqstatus);
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if (irqstatus & (0x1 << (axi_ctrl->share_ctrl->outpath.out4.ch0
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+ VFE_WM_OFFSET)))
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