On timeout while waiting for the vsync, send the current
timestamp to the userspace. This resolves the infinite
wait seen during the bootup.
Change-Id: Ib1426c7c9a21c37758d7352740938627d4613fd6
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
vsync sysfs entries should be created in mdp_probe instead of
creating in panel on. This avoids waiting for the first event
control in framework
Change-Id: I18b05b8d2a65d489afc6e3274ec8dc7a5b9a5f9a
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
vsync sysfs entries should be created in mdp_probe instead of
creating in panel on. This avoids waiting for the first event
control in framework
Change-Id: I983731481ea89bb7666be5f2a9f75a1e04fd963f
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature.
Change-Id: I22cfbd68c8bcbe4a47e94074393f1cbf79920c58
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Conflicts:
drivers/video/msm/mdp_dma.c
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Avoid eternal wait for vsync event when client tries to
read the corresponding sysfs entry. This will avoid hangs when
client tries to read in corner cases where the Timing
Generator or the clock or IRQ gets disabled.
CRs-fixed: 406752
Change-Id: I773687220b868823a9e4bfdae74361ee6487c5c6
Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Change to make the vsync IOCTL no wait during the disable sequence.
This is to increase the performance. Handle the synchronization of
vsync interrupt using state variables in drivers from now.
Change-Id: Ia5ec14493f233a95f21d01ea627200a6c278239f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Handle enabling/disabling the vsync interrupt and mdp clock
enabling/disabling in a better way on MDP 3.03 targets. This
will avoid target crashes due to unclocked register access.
CRs-fixed: 388751
Change-Id: I5c4a409772464ce7d06869374dcba5ad7e335955
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
When mdp commits a buffer to play, functions inside pan display, e.g.
mdp4_overlay_mdp_perf_upd are based on the current state of play, so
extending mutex to the scope of pan display to avoid race conditions.
Change-Id: I2e55567fd21de3738be066a2dee298d8122f12a3
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Disable IRQ for DSI_CMD_TERM was already called in the isr.
Removing the extra call present in the cmds_rx API's.
Change-Id: I0000dd3166beb2a3b0c788327e1d7520e0c11a13
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Add wait4videodone to commit dcs commands to dsi controller
while video engine is busy so that dcs commands will be
transmitted to panel at next beginning of BLLP.
Change-Id: I7ca40124813452f25a60f899437aeb9bce6feb14
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Pipe is not un-staged from mixer when it is unset.
It expects a pan_display() to un-stage it out of mixer.
Return fail at overlay_set() if pipe was still stage
at mixer.
CRs-fixed: 399193, 393979
Change-Id: I562f6e133bb239b30f4f53669dbf1cc5ddf80d02
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
There has VG1 pipe commit (pan display) happen after system
suspended. This left VG1 still staged up at mdp mixer. Once timing
generator is enabled at resume, VG1 pipe start fetching contents from
address 0 since VG1 has not yet be configured. This cause page fault.
This patch has sanity check at system suspend to make sure no any pipe
stage up at mixer after suspend.
Change-Id: Idcf974ceb4afe2a3ec55b9603b700fa497f84045
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
For the panels that have low v_back_porch, if h/w FIR scaling is used,
during vbp time, mdp clk should be fast enough to output a line from 4
input lines. MDP rate equation for very small scaling, e.g. 1 or 2
pixels' upscaling or downscaling cannot cover this case, where
underruns are seen on those panels.
Change-Id: I4f35f98c2c1bc4ef04dfee193427bd3ff674945d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
MDP4.1 blend operation registers are not double buffered and
take effect as soon as they are configured. Configuring these
registers at any place other than between dma and vsync produce
flickers as new blend values would get applied to previous
mixer configurations. Configure blend operation registers just
after dma is over, before vsync.
Change-Id: I377c11222f7a0cd77e98e90edec6e2e1dc0c17ca
Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
System performance is enhanced if the gpu frequency is given a
minimum corresponding to various frequency levels of CPU 0.
Change-Id: Iba168d708524fc8ef164428bb5f4e0631a499342
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit 682c7a01c1d86518cdc7bec25cb413498811137b)
Target reset happens when trying to do a ion_unmap_iommu
on the above fd, which was never mapped. Added a check for
non-zero virtual address.
Change-Id: I9a4d81eea6ee0cdbe3e8bbcb0c1d05c005680555
CRs-Fixed: 394779
Signed-off-by: Srinu Gorle <sgorle@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
DCVS only expects a core to be registered once and kgsl reregisters
the core every time the policy changes. Kgsl should only do the
sink start and stop every time and only do the register the first time.
Change-Id: Id54f078d6013586899bf85fc2462e6c473ffc6b5
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
(cherry picked from commit 229d24c088699c5f7a3591e5335dcc1668e5e913)
This patch ensures that camera is recovered by propogating the
error event when sensor is pulled off.
Change-Id: I4147e02342c2538db8337d3e04735cf97b2d7635
Signed-off-by: Azam Sadiq Pasha Kapatrala Syed <akapatra@codeaurora.org>
To make sure for each writeback play the reg is configured and avoid
mdp hang.
Change-Id: I29bdc31f27accca84e7add126c1c1e3c8a78fa15
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 36ca4e992dc5c75a2dd709969db850aa02e7c6e7)
Add the logic for wfd writeback interface. It already presents on
other display interfaces.
Change-Id: I389be77ec18041e260d0e71940586e86f1841ff8
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 3df55288659cfa826e9ad89cb38a8b722b2ae20f)
This change handles panel updates for WFD panel via
overlay_commit interface, along with conglomeration of
some common code across pan_update and overlay_commit ioctls
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Conflicts:
drivers/video/msm/mdp4_overlay.c
drivers/video/msm/msm_fb.c
include/linux/msm_mdp.h
Change-Id: I9e332856782c59ab598bb388a2ec482076746ad2
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Overlay_play() adds a pipe into pending queue and pan_display()
will commit those pipes to hardware and empty queue. This patch
will make sure queue is empty at suspend so that no unexpected
pipes will be commited to hardware by pan_display() at resume.
Otherwise, iommu page fault may happen.
Change-Id: Iafdf469c6cdbf5d469c9dee114555a8d1adb9c66
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Conflicts:
drivers/video/msm/mdp4_overlay_dsi_cmd.c
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
To improve performance, hardware vsync event at mdp driver
is passed to framework so that both composition and frame
update are aligned at vsync event. This patch will upgrade
wfd to incorporate vsync driven frame push in consistence
with other interfaces.
Change-Id: If088826ec387446301f1f6acc311d909edb04163
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
(cherry picked from commit d74db5fcf24a223570137087aa5632593b315fcc)
Conflicts:
drivers/video/msm/mdp4_overlay.c
drivers/video/msm/mdp4_overlay_writeback.c
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Always rest the ts_cmp_enable when an interrupt is received
from the GPU. This keeps legacy code that is not using
per context timestamps correctly updated. No effect is
seen with mainline code using per context timestamps.
CRs-fixed: 418172
Change-Id: I7f29086d4885571bdb165c0e759dc6ffc40b554f
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
When the sysfs entry for max clock is updated, set it immediately for the
devices that has no power scale policy. This prevents the device from
running with undesired clock.
Change-Id: I3211234f6d2afe4c2de115dace70b332d2b30f21
CRs-fixed: 408963
Signed-off-by: Ranjhith Kalisamy <ranjhith@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
With 8974, bandwidth requests are exceeding integer size.
Update ab and ib to ensure values over 4Gbps can be requested.
For 64-bit support, there are four changes in this patch:
Changes in the bus driver structures and functions to
update ab and ib values to uint64.
Updates in client drivers to ensure that the bus APIs
are called with the right types.
Updates to the device-tree. Device-tree nodes don't
provide a clean mechanism to read a combination of u32
and u64 variables within the same property name. So, the
ab and ib values must be specified in kbps instead of
bytes/sec from the device tree. The bus driver function
will convert the ab and ib values read from device-tree
to Mbps.
Change the existing property names to make them consistent
with the convention used by the new property name, which
abides to the Device Tree convention.
Change-Id: Ib0a6db0e221af366c61c51cc21ac722f02cb7a34
CRs-Fixed: 408786
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Adreno idle detection during a hang was being obstructed when
called from adreno_waittimestamp(). The variable active_cnt which
was meant to protect the device from going into suspend while
doing a waittimestamp was being set and was preventing the
check of rbbm_status register which was leading to a false hang
detection, where, if the rbbm_status register value had been
probed the device would have been found to be idle. We fix this by
having a separate function is_adreno_rbbm_status_idle() which checks
this register and report whether the core is idle or not. And we call
this function instead of the generic adreno_isidle() inside
adreno_hang_detect(). Doing this fixes at least one scenario of false
hang detection.
CRs-fixed: 406631
Change-Id: I44b5446769eaa361cca63674f700153ee3faff45
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Prevent the iommu fault handler from clearing the stalled status
of GPU on page fault. This will cause a GPU hang and print out
the snapshot that will help in fault analysis.
Change-Id: I9dcab83a098a988f86a0c03c46b0dbe6624de937
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Allow users to specify "big page" mode when allocating GPU
memory. This will attempt to allocate contigious units of 64k
bytes per instead of the usual PAGE_SIZE units. If the allocation
fails, then automatically fall back to allocate the rest of the
region with 4K pages. This means that potentially any allocation
could be comprised of a mixture of 64k chunks and 4k chunks.
Change-Id: Ib92c0c099d3b10ba54dbb864c5f977f8df4912f2
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
io_fraction is set to max so that io_wait gets reported
for DCVS so that MP decision won't offline cores
during GPU activity.
Change-Id: I39db72dd9c443069675a8a1b1f4e17d8928625b8
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Add a file for each process in debugfs named, kgsl/proc/<pid>/mem
which contains information about all memory allocations the process
has made.
Change-Id: Ice3f039d92cc1b1cdb5a6192808441ddfdf8abfb
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Add a "usage" field to memory allocation, mapping and
free ftrace events.
Change-Id: I673a9593650d5285b0abc8c94de8f9f80d3d449e
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Userspace passes a set of values indicating how it
uses each buffer it allocates, which were previously
ignored. These are useful hints for debugging and
profiling applications. These flags will be exposed
through ftrace and debugfs in later patches.
Change-Id: Ie26c26e413c074dcd5dfa24d355443ee47c3cd6a
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Some intensive shader operations can go for the full timeout
in the SP block without changes in th RBBM and CP registers
that we monitor for hang detection. Add the performance counter
SP_FS_FULL_ALU_INSTRUCTIONS to see if any full precision
instructions have been executed during the hang detection interval.
CRs-Fixed: 392730
Change-Id: Ic0dedbadd6e5bcd0b46aab4209430de2f74711f7
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Because we store process memory indexed by the thread group leader and
report pagefaults accordingly it helps reduce confusion to record the
TGID for the allocation in the memory trace messages.
Change-Id: Ic0dedbad79c7112c4a6746cea0941104519e495c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>u
VBIF registers are set dependent on what A3XX GPU core is present.
Set the registers from a table that is explicitly tied to each of
the A3XX GPU cores. This will prevent side effects across cores
when changing a specific cores VBIF data.
Change-Id: I4c20cd891a940abd85459ce5bf548cf91d06004a
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
When recovery fails we are in HUNG state and clocks are turned off,
If a client closes kgsl device, driver release gets called and
we will try to idle the device which leads to accessing GPU registers
without clock being on. This leads to excessive kernel logging
"kgsl_pre_hwaccess hw access while clocks off from state HUNG"
and this eventually leads to watchdog.
CRs-fixed: 397149
Change-Id: Iac720bef5d811269417ec1e5a346c95ce5a4324f
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Set the address translation to happen via ttbr0 for GPU IOMMU till
address 0x80000000 instead of 0x40000000. Also, adjust the size of
virtual pool so that it does not allocate an address greater
than 0x80000000.
CRs-fixed: 401364
Change-Id: I268dda47e82e80a7ee0a72a835c7777be8b6f7f5
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
If a hang is detected when allocating space in ringbuffer and
if the context for which the space is being allocated is hung
then do not allocate space at all.
Change-Id: Ia5ade2341fe5016119d8c140413860420c5c3a3d
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
The existing code leaves clks prepared when we transition from
NAP to SLEEP. We fail to reach Vdd_min as voltage scaling has
moved to prepare/unprepare.
Change-Id: I509f4c6bd217ead985890147819236dd2c5d03ce
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
There is a chance that we could fail to allocate memory and then write
to it when allocating entries for our scatter gather list. Handle the
error cases properly to prevent writing to NULL.
Change-Id: I33978ff53114ede7007b3240406583bcbef2f292
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Invalidate the base pointer even when tlb is flushed. For
gpummu the base pointers are invalidated even after just
a tlb flush, with IOMMU do the same.
Change-Id: I11c7d4b841e5f8becd30a087bcabc0ae69c3fee5
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Notifying the device of the hosts intention to power it off, gives the
device the ability to better prepare itself.
(cherry picked from commit f495d1b0d837af16a9e9881dbbcd7908abf88b33)
Change-Id: I43a6c576ea48508d60723f1002fc0fb26e9eafe4
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit 916072e4cb9373c054bc5a91ff289ac769958993)
This patch fixes up the broken suspend sequence for eMMC with sleep
support. Additionally it reworks the eMMC4.5 Power Off Notification
feature so it fits together with the existing sleep feature.
The CMD0 based re-initialization of the eMMC at resume is re-introduced
to maintain compatiblity for devices using sleep.
A host shall use MMC_CAP2_POWEROFF_NOTIFY to enable the Power Off
Notification feature. We might be able to remove this cap later on,
if we think that Power Off Notification always is preferred over
sleep, even if the host is not able to cut the eMMC VCCQ power.
[merez@codeaurora.org: resolved various merge conflicts.
Fix in mmc_resume already exists]
(cherry picked from commit cec02a451276a70cdeb0576ec89d6b5b76e4e18b)
Change-Id: I4f29c213d745dcb1ec50b34b535657328042b4b2
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Saugata Das <saugata.das@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit 91cf2698afab3f0707f739a02eb639205798f1dc)
When a failure occurs while creating a device attribute,
we need to remove previously created attributes prior to deleting
the disk.
(cherry picked from commit 8d006d3f139c46beaeee138bda9d0807185661a9)
Change-Id: Ic5ebba9c06f3811534f5b5e8c0399809e5dc9f23
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit 7256cdc299a4d42c1d316afbac98d320154ce6da)
The version of PON support accepted by the linux community is
slightly different from the one that was merged. This revert is needed
in order to upload the latest version from the linux community.
This reverts commit 76058d7388c6edde07fd6289ce082dc1a1813b26.
(cherry picked from commit 8b458cf768db937d3a2274e216819a1a217e97f8)
Change-Id: I0cb611698b25de600dbaa54678edae661456e485
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit 6e3e74d3ba5c825108b0a63018376b12e61592f9)
In the current soft reset sequence performed as part of
CMD/DATA error recovery we do the following:
1) Write 1 to DML_SW_RESET
2) Reset CPSM/DPSM by clearing MCI_CMD and MCI_DATA_CTL
or by writing to MCI_SW_RST_CONFIG.
3) Re-init DML
4) Reconfigure both consumer and producer BAM pipes.
The BAM pipe reset does not reset the sideband signals, since
only SDCC side is reset SDCC - BAM communication will go out
of sync and cause DML to be stuck without transferring data.
Hence reset BAM core every time SDCC is reset (which is on
error recovery).
Fix error handling for sps pipe or device reset.
(cherry picked from commit 3ca90f02963ddbbdb300eb55c49aca18091c3f49)
Change-Id: I82bd6c5f3db6ac71da912cef935dfd179b099ed4
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
(cherry picked from commit 9b2f00f099f4f17025a9834eb38fc67254164608)
Signed-off-by: Maya Erez <merez@codeaurora.org>
