Commit Graph

10669 Commits

Author SHA1 Message Date
Mahesh Sivasubramanian
7401d5e5eb msm: spm: Update spm device tree for L2 command sequences
The SPM device tree entry to configure L2 SAW doesn't distinguish
between Krait and L2 SAW low power modes. Update the device tree to
differentiate between L2 and Krait low power modes.

Change-Id: I6c7cf6f8dd10478fd53826e22b17ed98d46b68b4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2013-02-27 18:11:20 -08:00
Ramesh Masavarapu
1a2b7fcc56 tzcom: Remove tzcom driver components.
Remove tzcom driver components that includes files,
clock definitions. Currently tzcom driver has been replaced
by qseecom driver.

Change-Id: I1832d921a7b949057b84a7e0aa9afaa445be5194
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
2013-02-27 18:11:13 -08:00
Ramesh Masavarapu
44f43c43c3 qseecom: Add device tree entry for copper.
Add device tree entry for qseecom driver on copper targets.

Change-Id: Icb8d5f41c2cad098419dbee9b8e4d99ab20b0dff
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
2013-02-27 18:11:12 -08:00
Stephen Boyd
567fec6a4b Add snapshot of mach-msm from beginning of msm-3.4
This also includes various documentation files and the devicetree
files for msm boards.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-27 18:09:25 -08:00
Maya Erez
081e5b9636 mmc: block: Add write packing control
The write packing control will ensure that read requests latency is
not increased due to long write packed commands.

The trigger for enabling the write packing is managing to pack several
write requests. The number of potential packed requests that will trigger
the packing can be configured via sysfs by writing the required value to:
/sys/block/<block_dev_name>/num_wr_reqs_to_start_packing.
The trigger for disabling the write packing is fetching a read request.

Change-Id: I982170fa6dca9150ea4310bb546b838b7fd30e9b
Signed-off-by: Maya Erez <merez@codeaurora.org>
2013-02-25 11:40:57 -08:00
Hamad Kadmany
a9106b98ce media: dvb: Add MPQ documentation
Added text file which describes MPQ DVB adapter implementation
and the extensions made for linux DVB core

Change-Id: I50df66a8bec52c224dd00be205ffc022c4d1f13a
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
2013-02-25 11:40:29 -08:00
Sathish Ambley
b1193b5632 msm: iommu: Add support for SMMU v2
SMMU v2 is based off the ARM SMMU architecture specification.

The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory.  In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.

The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.

Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
2013-02-25 11:40:12 -08:00
Jaime Lopez
3b6e9f543b ipv6: Enable new mode proxy_ndp == 2
This new mode allows Neighbor discovery packets to be sent to userspace
without regards to the state of the forwarding setting. Without this, NDP
packets addressed to the host are still received, but those for other
addresses are not.

Enabling this mode allows NDP proxying to be performed from userspace.

Change-Id: I69b7a7c0c42e3253c42d6f2e163c0ce1d848aed6
Signed-off-by: Jaime Lopez <jaimel@codeaurora.org>
2013-02-25 11:36:58 -08:00
Stephen Boyd
50a332f764 Documentation: Point to correct header file
The header file was renamed to pm_qos.h in e8db0be (PM QoS: Move
and rename the implementation files, 2011-08-25) but this
documentation wasn't updated. Update it.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:36:56 -08:00
Stephen Boyd
51a90bdc29 Documentation: document msm_otg driver
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:36:55 -08:00
Pavankumar Kondeti
9fff2227bf msm: Add device tree support for HSUSB
Add device tree support for MSM HSUSB.  The OTG driver registers
gadget and host platform devices based on the operational mode.
This patch also updates the copper device tree source file with
HSUSB device specifics.

Change-Id: I0a50b0500d15f32ff65468cdb411398a80a20329
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
2013-02-25 11:36:11 -08:00
Manu Gautam
34885c980c gadget: android: Add RMNET function drivers
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:34:47 -08:00
Ido Shayevitz
3716282e02 usb: dwc3: Add MSM dwc3 wrapper
Add MSM USB3.0 super-speed controller.
The MSM USB3.0 controller is a wrapper of Synopsys's DesignWare
USB3.0 controller which also includes other HW units as the DBM.

The copper device-tree now includes a new device for this controller,
which will be attached to the dwc3-msm.c driver.
The dwc3-msm.c driver will be used for MSM specific operations of USB3.0
(as managing the DBM) and for now it just add in runtime a core dwc3 device
that will be attached to the dwc3/core.c driver.

Change-Id: I1e0a9144971b2de533d4d1ce7ac5f0c3584d1930
Signed-off-by: Amit Blay <ablay@codeaurora.org>
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
2013-02-25 11:34:14 -08:00
Manu Gautam
fe9ac8e31c usb: ehci: EHSET Test-Fixture device driver for host compliance
An EHSET test fixture is used to initiate test modes on an embedded
host controller while performing the usb host compliance testing.

During enumeration by the USB host this test fixture presents a VID/PID
pair and this PID value corresponds to the requested testmode.

Change-Id: I7558f9c1c37b3c65be2b358d964b295593c021d9
CRs-Fixed: 174266
Signed-off-by: Manu Gautam <mgautam@qualcomm.com>
2013-02-25 11:34:12 -08:00
Jordan Crouse
7433537fe2 gpu: Add MSM KGSL gpu driver
Take in the entire GPU driver as of commit
75c34ca1b4e69e96921e4153dfa9d399e5b9d2e8 in msm-3.4

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:33:51 -08:00
David Collins
ff04efbf35 regulator: Extend of_get_regulator_init_data to support non-DT consumers
Extend the of_get_regulator_init_data function so that it can
parse an additional property from regulator device tree nodes
which is needed to support non-device tree consumers.

The new property is named qcom,consumer-supplies.  Its value
is a list of strings of the form:

qcom,consumer-supplies = "supply_name1", "device_name1",
                         "supply_name2", "device_name2", ...

Change-Id: Ia689d04e6de568e6889b807eed15df3116de01d2
Signed-off-by: David Collins <collinsd@codeaurora.org>
2013-02-25 11:33:46 -08:00
David Collins
7066219187 regulator: Add qpnp-regulator driver
Add the qpnp-regulator driver to support regulators found in
Qualcomm plug-and-play (QPNP) PMIC chips.  QPNP chips make use of
Qualcomm's SPMI register convention.  The particular hardware
characteristics of a given regulator can be derived from the
values present in the type and subtype registers.

The qpnp-regulator driver supports probing with either device tree
device specification or with board file specified platform data.

Change-Id: I4f74431a50949763d651faf992b5d2567d05758e
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Squash in DT binding document]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:33:44 -08:00
Michael Bohan
317a4316b4 of: of_spmi: Add support for spmi-dev-container binding
The spmi-dev-container binding is intended for SPMI
configurations that have multiple device nodes associated with
only one spmi_device. By default, if this flag is not specified,
each device node will create a new spmi_device.

Sometimes having multiple spmi_devices for SPMI device nodes is
superfluous. One example of this is gpios. In some architectures,
a single gpio is treated as a unique device. But from a gpio_chip
perspective, the chip is comprised of many gpios. Beyond wasting
memory allocating a unique spmi_device per gpio, the implication
of not coalescing spmi_devices is that the clients probe() routine
would be called N number of times. But this sort of behavior makes
it difficult to realize when a gpio_chip starts and stops. If we
assume that one gpio_chip represents one call to probe(), then
this problem is solved, since all gpios in that chip will be
passed as resources.

In order to support multiple device nodes per spmi_device, we
also need to extend the data structures for spmi_resources.

This change also makes an effort to cleanup some of the error
handling for illegal combinations of device bindings, as well as
adding some additional documentation.

Change-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:33:02 -08:00
Michael Bohan
eca47776b5 of: of_spmi: Change name of spmi-dev-container
This binding is currently used to indicate all devices existing
in the same slave. Let's change the name to be more meaningful.
The real motivation here is that we want to introduce a new
binding to specify all qpnp devices existing in the same
spmi_device. So spmi-dev-container is a more meaningful name for
that usecase, and spmi-slave-container better describes the
former.

Change-Id: I48f834b9cff9ea90d05f5e958ca21bef0ab56a86
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:33:02 -08:00
Kenneth Heitke
ece3ce45c6 spmi: Add MSM PMIC Arbiter SPMI controller
Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and
is used to communication with one or more PMIC (slave) devices on the
SPMI bus.  The PMIC Arbiter is actually a hardware wrapper around the
SPMI controller that provides concurrent and autonomous PMIC access
to various entities that need to communicate with the PMIC.

The SPMI controller hardware handles all of the SPMI bus activity (bus
arbitration, sequence start condition, transmission of frames, etc).
This software driver uses the PMIC Arbiter register interface to
initiate command sequences on the SPMI bus.  The status register is
read to determine when the command sequence has completed and whether
or not it completed successfully.

Request Capable Slave (RCS) devices can initiate a master write
command sequence on the SPMI bus that the can be decoded by the
bus master and used to generate interrupts.

Change-Id: I037fefc946ccb5b8e0b04da856a3a96effe1c7e4
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:32:58 -08:00
Michael Bohan
bb75acd691 of: Add Device Tree support for SPMI
This change adds SPMI Device Tree parsing. The
of_spmi_register_devices() API should be called from the probe()
routine of each SPMI controller to parse the subtree and add the
respective SPMI devices.

The SPMI subtree is nested up to two levels deep. The first level
is the most basic and treats the address as the SPMI slave ID.
This should be used for simple devices that has no notion of
segmented SPMI address spaces.

An optional second level specifies the address as an offset
within the outer layer's slave ID. This is used to specify
multiple devices on the same slave ID that have different address
ranges. In fact, it's reasonable to specify any number of address
ranges at this level.

Devices can also specify any number of interrupts that's decoding
is done by an external interrupt device.

Sections of this code were taken from drivers/of/platform.c.

Change-Id: Ib9f06764a9bd85e3b2aab43b72aa7132885aa044
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:32:57 -08:00
David Brown
3db739bbbc slimbus: Add Qualcomm Slimbus driver
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:32:56 -08:00
David Brown
cb6442aa26 spi_qsd: Add MSM SPI driver
Including the following patches:

commit 0f7723bb09440ae69743fed38cf558a838aa9bdf
Author: Bryan Huntsman <bryanh@codeaurora.org>
Date:   Thu Oct 6 23:13:56 2011 -0700

    Revert "spi_qsd: GPIO configuration changes for SPI chip-select line"

    This reverts commit 7eaa08b75995289a91c7dd1f3616f79227f5f923.

    Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>

commit 7eaa08b75995289a91c7dd1f3616f79227f5f923
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Wed Sep 28 16:26:39 2011 -0600

    spi_qsd: GPIO configuration changes for SPI chip-select line

    The chip-select GPIO's pertaining to each slave remains in suspended
    configuration until the first transfer is intiated by the slave.

    Change-Id: I3aa8555289be7ce457b91a969cf03909be0965d7
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit e47df9f9b932968152ab2908153e60adab4402d7
Author: Jordan Crouse <jcrouse@codeaurora.org>
Date:   Mon Sep 19 11:21:16 2011 -0600

    spi_qsd: Fix possible uninitialized variable

    Change-Id: Ic0dedbad184046e9835cde015ad5d592f33e82a6
    Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>

commit 4ae02c76b98f2b96bfb8c4fa02f40cfda2f16f97
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Tue Sep 20 17:28:50 2011 -0600

    spi_qsd: Fix Klocwork errors in SPI driver

    Change-Id: I1fe6632e68ea625966aced37a1b140b30534e101
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit 52e065ba3d86977b59937693ac7e85836cf4eca8
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Thu Sep 1 12:12:58 2011 -0600

    spi_qsd: Fix for SPI Operational State Invalid error

    This error is reproted randomly when the SPI core is put
    into RUN state and occurs when the ACPU clock is low.
    When the timer expires, we check again to ensure that the
    STATE_VALID bit is set before returning.

    Change-Id: Ic8912534f4924efd999b8aa1d75a9fd19749e870
    CRs-fixed: 304672
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit a9a8816913e5466e06b443c42cbf8ae866b95fd1
Author: Jeff Ohlstein <johlstei@codeaurora.org>
Date:   Fri Sep 2 13:55:16 2011 -0700

    msm: dma: remove crci conflict checking

    The crci conflict checking code was designed for a system where a crci's
    mux could be changed at runtime. In reality, our chips configure these
    statically, so it is not necessary.

    Change-Id: I4d5f32cd8728d3c78fca8f64aed0e02b57b6afba
    Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>

commit 36c6f1bb48af3e65db281cc7ccb913a8e81a598e
Author: Matt Wagantall <mattw@codeaurora.org>
Date:   Wed Aug 17 15:44:58 2011 -0700

    msm: clock: Rename all I2C/SPI clocks to 'core_clk' or "iface_clk"

    Drivers should now use their device names to distinguish between
    clocks of the same type rather than the clock name.

    Change-Id: Iab12caf4eab163773d68f1b2adc1bb4c72c69e83
    Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

commit 55e656e68cac78eaa367341df2e693a483a53f84
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date:   Mon Jun 6 14:34:38 2011 -0700

    drivers: barriers: Replace dsb() with mb()

    Replace explicit dsb() calls with mb(). Now that the
    generic ARM implementation defines mb() to mean (at least)
    dsb(), it is appropriate to switch back to the generic
    kernel version of the barriers. This is also needed for
    correctness on certain targets (such as 7x27) where dsb()
    is insufficient and other operations (such as outer cache
    sync or writing to strongly-ordered memory) are required to
    ensure proper I/O operations ordering. In some cases,
    remove explicit calls to outer_sync following a barrier
    since the barrier will now have an explicit outer_sync
    call.

    Change-Id: I2c53b8534af9c3cbac4d4d77b322f897a39e7758
    Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>

commit 17194a32164b868f80ce84e313f9148d1dc77e7b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Fri Jun 3 18:10:09 2011 -0600

    spi_qsd: GPIO configuration changes

    On suspend, the SPI related GPIO's enter a low power configuration
    and on resume they move to an active configuration. This helps
    conserving power during power collapse.

    Change-Id: I0911867e10fadcfc6950f6dddf74226bd6321c16
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit 1777d88688511cd59bad7674c6a2246e0c93142b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Wed Jun 1 16:54:07 2011 -0600

    spi_qsd: Remove restriction on SPI clock speed.

    When multiple slaves are connected to the SPI controller,
    the driver does not allow the clock to go from lower speed
    to a higher speed. This restriction is not required since
    there can only be one slave listening at a time. Also,
    there are no hardware limitations in doing so.

    Change-Id: I4ecabfb3a1515416f050c18678cf0987dcde9d1e
    CRs-fixed: 290127
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit 4b7c7bfc546cb02141da9d034421aefe5635f857
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Tue Jun 7 14:18:42 2011 -0600

    spi_qsd: Add null pointer check before dereferencing

    During probe, there is no cur_msg to set the status.

    Change-Id: I82e00b9d74d45c36b70078b171db1bb150d1bfac
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit bf514c766fcc2bdee680f80a2ea16c7fead0be96
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date:   Mon May 16 13:37:11 2011 -0700

    msm: spi: Fix access to unclocked registers

    Don't program the GSBI configuration until the clocks have
    been turned on.

    Change-Id: Idee5f5dffcb5ed0f7de18f1e508ee8c76b618894
    Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>

commit d9c248213f4cd025f3d3586f0de81e4bc44a5a54
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Mon May 16 16:43:08 2011 -0600

    spi_qsd: Fix for SPI input overrun error

    This error occurs due to a bug in the controller.
    This bogus error is reported when a transition from run
    to reset state occurs and if the input FIFO has an odd number
    of entries.

    Change-Id: I555864d4855ac6d416997da69d8bc6aee7a82178
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit e99ceb5b3da7bec51be853809c25df8e32b2c1e6
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Thu Apr 14 18:36:34 2011 -0600

    spi_qsd: Multi-transfer handling

    When there are mulitple SPI transfers in a message, we
    default to using FIFO mode for all the transfers. As special
    case, we handle a WR-WR or WR-RD transfer where we choose
    between FIFO mode and DM mode based on the total length of
    the transaction.

    Change-Id: I6fbc1a06a22f9782db5b97c9b87cc53392a8c2fa
    CRs-fixed: 276666
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit 8f3d3aaa51603a929027bc820fe2d3515e959779
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Tue Apr 19 14:19:29 2011 -0600

    spi_qsd: Ensure IO operation ordering

    Adding memory barriers to ensure that the writes and reads
    to the SPI and QUP registers happen in the correct order.

    Change-Id: I86d8f63b0e9547a2339ee4ab5c713cf8864fef04
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 36b3fae5f54230cd1e4ca072d1f55cb2f79d8945
Author: Laura Abbott <lauraa@codeaurora.org>
Date:   Thu Oct 14 12:48:16 2010 -0700

    spi_qsd: Fix section mismatch

    The function msm_spi_probe is referenced outside of the __init section.
    This fixes the problem by calling platform_driver_probe instead of
    platform_driver_register since this device is not hotplugable.

    Change-Id: I3a563c6fc562ada959317b54ff60a38f9ce517d8
    Signed-off-by: Laura Abbott <lauraa@codeaurora.org>

commit dc2e36eecefb6628031afeff28afd9d97f2f3f6f
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Wed Sep 29 16:58:20 2010 -0600

    spi_qsd: Changes to support DM mode.

    The dma_config function may not always be present.
    This change makes sure the driver gets DM resources
    irrespective of the dma_config function.

    Change-Id: I25a2497d20e973f22b76f2b5d6f68c86bd4d5f1d
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a39bd4a398674c320925540eec91d94d2b7d53f3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Thu Aug 19 17:48:01 2010 -0600

    spi_qsd: Modify timeout mechanism to check SPI state valid bit.

    In order to allow sufficient time for the SPI state
    transition to occur, calculate the timeout based on
    the SPI clock speed.

    Change-Id: I3d6955b2a64a8bf8980590e352fbd564250210fb
    CRs-fixed: 250998
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit b5887b644ba9545672d637985713c7e0e2e5bb50
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Tue Aug 3 16:57:33 2010 -0600

    spi_qsd: Use FIFO mode when DM mode configuration fails.

    When the Data Mover configuration fails, the driver
    uses FIFO mode.

    Change-Id: Iaf83e50fe725654c58260c5cd1150cdeb56f51c8
    CRs-fixed: 249238
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit ced8ad320d480006643a3aa3474f5c0d77457454
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Mon Jun 28 16:01:33 2010 -0600

    spi_qsd: Use SW timeout instead of SPI_TIME_OUT register.

    Since the software timeout is already present in the driver,
    the hardware SPI_TIME_OUT register is being removed.It is just
    redundant and used only for debugging purposes.

    Change-Id: I829cb944444fc3e5053bc810adffe2b87f511b63
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit 35e9155f59317e8ef63b8ce5190f26f5cae6a8ee
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Fri Jun 25 16:48:25 2010 -0600

    spi_qsd: Disable irqs in the probe function.

    The irqs are disabled at all times in the probe function
    irrespective of the use of remote lock.

    Change-Id: I0997d07b93c97a12bca6d80a9bba59682b1bec3e
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit e6af92d74a35ba267125bc61c2c6c18034c03af3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date:   Tue Jun 22 12:20:46 2010 -0600

    spi_qsd: Disable clocks and irqs when SPI bus is not in use.

    The SPI clocks and irqs are enabled per workqueue and correspondingly
    disabled once the workqueue is completed.

    Change-Id: Ib22b7e3b946eb4c829940e43327caaf5aff7721b
    CRs-fixed: 242866
    Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>

commit b25e4220efdacc231cb150fc263af1e3f525b165
Author: Lena Salman <esalman@qualcomm.com>
Date:   Tue Jun 8 15:25:47 2010 +0300

    spi_qsd: Add usage of MX_WRITE_COUNT register

    Use MX_WRITE_COUNT register to reduce the amount of TX interrupts in
    FIFO mode for transfers smaller than FIFO size.

    Change-Id: I7208fdc85b626a31a8b781ee5c56f73beee6c427
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 7ed56f3441c5ebe7fd8107fb8468207a88bc743f
Author: Lena Salman <esalman@qualcomm.com>
Date:   Wed Jun 9 16:14:44 2010 +0300

    spi_qsd: Minor changes to support Data Mover mode on QUPe core

    Minor changes to support Data Mover made on QUPe core.

    Change-Id: I54663115a43f7fd9b52a2ddee796b5499d5f239a
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit a85fd0ab6484eb2ef404c062adffce1ee22337f1
Author: Lena Salman <esalman@qualcomm.com>
Date:   Thu Jun 3 13:57:02 2010 +0300

    spi_qsd: Add support for QUPe controller

    QUPe controller is a new version of Qualcomm SPI controller. The
    controller also supports other peripheral protocols, however its SPI
    functionality is very similar to previous SPI core, supported by spi_qsd.
    Therefore the same driver is being utilized with some register address
    modification and minor flow change.

    Change-Id: Ic091ef2c2ed699b43f786c278b613e69a7e9039b
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit ce270f6f9198cf40ee5638b35e595da81116241e
Author: Jeff Ohlstein <johlstei@quicinc.com>
Date:   Thu Apr 29 13:40:53 2010 -0700

    drivers: spi: Support ADM3 in spi_qsd driver

    Change-Id: I6dfa38a4c33a8e4619d56ce30787e1aeafc8356d
    Signed-off-by: Jeff Ohlstein <johlstei@quicinc.com>

commit 47346fa611773ef92d12d9145ea33a7f2c79052f
Author: Lena Salman <esalman@qualcomm.com>
Date:   Wed Apr 28 11:33:15 2010 +0300

    spi_qsd: Add disable/enable of pclk to suspend/resume functions

    Add disable/enable of pclk to suspend/resume functions to improve
    power performance.

    Change-Id: I871e5ac90a998f2942778bb1e8c2c9d583a9ae00
    CRs-fixed: 235046
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit a96eba98fbbd21ac657f5d551466909352766ead
Author: Lena Salman <esalman@qualcomm.com>
Date:   Sun Apr 11 10:40:37 2010 +0300

    spi_qsd: Making irq code implicit for the core mode in use

    Make code clear regarding what mode is in use in the irq.

    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 6a02d85f8f48cf6f86cddc38c9fce9c1179208b4
Author: Lena Salman <esalman@qualcomm.com>
Date:   Tue Apr 13 21:16:45 2010 +0300

    spi_qsd: Separate tx/rx/error statistics between contexts

    To improve SMP safety, separate the tx/error statistics between
    contexts. This protects the statistics from accidentally being
    access from another context at the same time.

    Change-Id: Ibc52406e7b06a4bb5142f8a09a2f35442cb9df8a
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 31f301c171aab8e42f8b6abe9b7866412cb546a8
Author: Lena Salman <esalman@qualcomm.com>
Date:   Tue Mar 23 14:51:00 2010 +0200

    spi_qsd: Add better handling for pending transfers during suspend

    To improve SMP safety, add better handling in suspend function to wait
    for graceful closure of pending transfers. This graceful closure waits
    for all the pending transfers to finish or timeout, while not allowing new
    ones to queue up. This allows correct handling of all the resources
    involved in a transfer before suspend.

    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 8fbf6e4c5371520b5f9de2001e2ebd15773e918b
Author: Lena Salman <esalman@qualcomm.com>
Date:   Thu Mar 25 10:44:10 2010 +0200

    spi_qsd: Add mutex to get exclusive access to controller registers

    To improve SMP safety, add mutex to get exclusive access to controller
    registers.

    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 9405adda67d8c6a856243e599f09d806b4bc6de5
Author: Kenneth Heitke <kheitke@quicinc.com>
Date:   Thu Apr 15 16:33:16 2010 -0600

    spi_qsd: Move global input_fifo_size to device context.

    Fix reference to device data input_fifo_size which is missing from the
    previous patch.

    Change-Id: Ia469896edd0fd90d7ded2b8ec44f9075474b3ec8
    Signed-off-by: Kenneth Heitke <kheitke@quicinc.com>

commit 6031094ca6a940a47437bc6a092e813b4bc41d2a
Author: Lena Salman <esalman@qualcomm.com>
Date:   Sun Apr 11 10:34:48 2010 +0300

    spi_qsd: Move global input_fifo_size to device context.

    To improve SMP safety move global variable input_fifo_size to device
    context.

    Signed-off-by: Lena Salman <esalman@qualcomm.com>

commit 97f585033413b1f8ae210bbffd617a4af3462982
Author: Lena Salman <esalman@qualcomm.com>
Date:   Wed Apr 14 18:35:54 2010 +0300

    spi_qsd: Initial contribution of the MSM SPI driver

    This adds MSM SPI controller driver. The driver is SPI master, and
    allows slave connections. Current version of the driver supports
    FIFO and DM modes chosen upon the message size. The driver also
    supports loopback mode which can be used for testing purposes.

    This is a squashed version of all the MSM SPI driver changes on the QuIC
    MSM 2.6.29 kernel which can be found at www.codeaurora.org.
    It also contains all relevant adaptations to SPI core changes in 2.6.32
    kernel.

    https://www.codeaurora.org/gitweb/quic/la/?p=kernel/msm.git;a=blob;f=drivers/spi/spi_qsd.c;h=1c8e3ec727b29040648ef9a4949396f7109528ae;hb=refs/heads/android-msm-2.6.29b

    Change-Id: Ibc1e71deb662af87deed77f10dcc8a3a46a8f012
    Signed-off-by: Lena Salman <esalman@qualcomm.com>

Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:32:51 -08:00
David Brown
a97c946614 tty: serial: Add MSM HS serial driver
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:32:48 -08:00
Michael Bohan
94f44896e2 msm: qpnp: Add gpiolib support for PMIC GPIOs
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.

The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.

This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.

Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
2013-02-25 11:32:09 -08:00
Rohit Vaswani
dff77def0f net: QFEC Ethernet driver
QFEC is 1 Giga-bit Ethernet MAC module residing in FSM9XXX.

Change-Id: I718fb578cfb56d598ec5fd8b9ffebad4414a7830
Acked-by: Kaushik Sikdar <ksikdar@qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2013-02-25 11:32:06 -08:00
Sachin Shah
67026061d7 tzcom: Trustzone communicator driver
- The Trustzone Communicator driver provides interface for userspace
  to communicate with TrustZone.

Change-Id: Id0dadacb9997d4a50e88f48ceb03540e1897df93
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
2013-02-25 11:31:54 -08:00
Vladimir Kondratiev
76511929e1 [ARM] msm: TSIF driver for Qualcomm MSM
Low level TSIF (Transport Stream InterFace) driver
provides in-kernel API to be used by upper layer
drivers;

included also is example for upper layer driver
that uses TSIF API and implements character device.

Signed-off-by: Vladimir Kondratiev <vkondrat@qualcomm.com>
2013-02-25 11:31:48 -08:00
David Brown
d1098dd2a8 tspp: Add transport stream packet processor
Including:

commit 6bac783fae7e7c5a5bfc95e2cdc9b4f22ca53d44
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date:   Thu Dec 20 18:30:40 2012 +0200

    tspp: Disable read-complete interrupt

    Read-complete interrupt can be generated from TSPP HW for test
    purposes only. It is generated for each TS packet TSPP fetches from
    TSIF interface. Having it enabled cause great load of interrupts
    that are not used by the SW.

    Change-Id: If2038f184a8b0904fba3e1cca5e110fd9daa52d3
    Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>

commit 81cee0596e3cdf8102bf8c8ef45e5f3a07fc8a4d
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date:   Thu Nov 29 14:15:57 2012 +0200

    tspp: Improve data-path handling

    Existing driver allocated BAM descriptor at fixed sizes each
    with interrupt flag set. Notification on data was received when
    the descriptor is fully consumed by the HW. The descriptor size
    on one hand need to be big enough so that we don't receive too much
    interrupts for high-bitrate streams, and on other hand needs
    to be small enough so that for low-bitrate stream we are not starved
    waiting for data for a long period of time.

    The change adds support of allocating small descriptors and set
    interrupt flags on part of descriptors. In addition, expiration
    timer is used so that if interrupt is not received after long period
    of time the timer handler reports back descriptors are already ready
    to be consumed. This allows low-rate of interrupts and
    handling of low-bitrate streams.

    As descriptors are smaller now (size of single TS packet), exposed
    API within SW demux that handles a single packet to save the function
    call to the API that handles multiple packets for efficiency. Information
    regarding the new buffer allocation was added to debugfs.

    CRs-Fixed: 420818
    Change-Id: I4bb05177774ab0e0bad0737ca1106a0c33f843ae
    Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>

commit 44307d32e23a2bb2a190d88bb049cc34d1e20418
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date:   Sun Nov 25 09:49:51 2012 +0200

    misc: tspp: Enable notification of TSIF status and expose it in debugfs

    Enable TSIF status interrupt to expose the following
    information in debugfs:
    - stat_rx_chunks: Counts number of TS packets chunks received from HW.
    - stat_overflow: Counts number of times buffer has overflowed.
    - stat_lost_sync: Counts number of times TSIF lost sync with input.
    - stat_timeout: Counts number of times TSIF reached timeout
    waiting for packets.

    All counters can read and reset by writing to the respective file.

    Change-Id: I475c2c0845c85ac22ea720059fb28c4a588fedcf
    Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>

commit 72b785570b265c6fcb4cb907c0c3a3a4b311f1f1
Author: Liron Kuch <lkuch@codeaurora.org>
Date:   Tue Oct 30 17:47:50 2012 +0200

    media: dvb: mpq: TSPP output buffer allocation by demux plugin

    The TSPP driver can allocate its output buffers internally or
    externally. External buffer allocation is required when Demux wishes
    to use the ION driver to allocate a physically contiguous buffer
    (e.g. to pass to TZ).
    This commit improves the TSPP driver support for external buffer
    allocation and implements the external memory allocation and free
    functions in the Demux driver.

    Change-Id: I71da4f18c090ef224c4fc7b23f55b9b3636be996
    Signed-off-by: Liron Kuch <lkuch@codeaurora.org>

commit 92705b3eb380826abf8ddefc25a8d210ffa64ff5
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date:   Tue Oct 23 14:15:41 2012 +0200

    tspp: Add option to inverse tsif signals

    TSIF signals (clock, data, enable and sync) may be configured
    to be inversed at TSPP unit input. This is useful in case
    TSIF signals from external units need to be inversed.

    Change-Id: Idd21948baccedc7499b31ed1d4df0f737538c870
    Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>

commit 435ad8e2157eec5783a435f1e7ec47f67d759882
Author: Joel Nider <jnider@codeaurora.org>
Date:   Wed Dec 14 16:53:30 2011 +0200

    tspp: add kernel api for video demux component

    The demux is an in-kernel software component whose purpose is to take
    an incoming TSIF stream and split it into multiple output channels
    based on the PID field in each TS packet. Each output channel can be
    used for a different purpose, such as audio, video or channel
    information. In order to get good performance when moving such large
    data streams around, the demux was placed in kernel-space as to
    prevent copying memory buffers between kernel-space and user-space, at
    least at this early stage in processing the traffic. Originally the
    design of the TSPP driver was based on the earlier TSIF driver, so it
    contained only a user-space API.

    Change-Id: I22799eb19d9049e3635d5c589b02f999d9b8e1c7
    Signed-off-by: Joel Nider <jnider@codeaurora.org>

commit 6544f3e52c9c1707a5a8fa90d32f89d80dabb4b9
Author: Joel Nider <jnider@codeaurora.org>
Date:   Tue Jul 10 13:50:06 2012 +0300

    tspp: use new clock preparation functions

    Replace the clk_enable() with clk_prepare_enable() and replace
    clk_disable() with clk_disable_unprepare() functions.

    Change-Id: I63479090eccbeac46f091bf95faeb857139d23a4
    Signed-off-by: Joel Nider <jnider@codeaurora.org>

commit b9662ca49cfe619e076476dcf8297a4031f0c310
Author: Joel Nider <jnider@codeaurora.org>
Date:   Sun Jun 10 14:21:11 2012 +0300

    tspp: use device name when getting clock

    The new method for requesting clocks requires a driver to pass its
    device name for comparison to the list of available clocks.

    Change-Id: Ica5b09447de177beead90f8b7c721b84820fbdf7
    Signed-off-by: Joel Nider <jnider@codeaurora.org>

commit 5556a8524591e4d1c4c9188316551900e8b8382d
Author: Joel Nider <jnider@codeaurora.org>
Date:   Sun Oct 16 10:52:13 2011 +0200

    misc: tspp: adding TSPP driver files

    The TSPP driver manages the transport stream packet processor.  This core
    is used to offload the main CPU by handling MPEG TS packets, generally
    coming from a broadcast modem using the ISDB-T (or variant) protocol.

    Change-Id: Ia4c16dcce970ae0f52d8d17957a92fce34ecdb44
    Signed-off-by: Joel Nider <jnider@codeaurora.org>

Signed-off-by: David Brown <davidb@codeaurora.org>
2013-02-25 11:30:54 -08:00
Sagar Dharia
5dcb8d8a84 qup_i2c: Initial implementation of I2C mini-core driver for QUP
QUP (Qualcomm Universal Peripheral engine) hardware provides FIFO
based data path to mini cores like I2C. i2c-qup driver communicates
with the QUP and its FIFOs.
Advantages of this driver include 1-interrupt per FIFO/BLOCK number
of byte unlike 1-interrupt-per-byte of i2c-msm.
Since the QUP hardware communicates with I2C mini core, and this
driver communicates with QUP hardware, driver communicating with
I2C hardware directly (like i2c-msm) can't be used to communicate
with QUP. QUP has FIFO mode and BLOCK mode. FIFO mode can be used
if the data transfer size is less than FIFO size. BLOCK mode should
be used for transfers greater than FIFO size.
FIFO mode is supported in this initial implementation.

Signed-off-by: Sagar Dharia <sdharia@quicinc.com>
2013-02-25 11:29:54 -08:00
Stephen Boyd
ffda655125 crypto: Add MSM crypto drivers
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:28 -08:00
Stephen Boyd
57b74303d6 mmc: Char SDIO Device Driver
Squashed commit of the following:

commit c3fb53893cbc4b5e217ef176010d1b88982a9454
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date:   Wed Sep 15 17:16:52 2010 +0200

    csdio: Set/get vdd ioctl support

    Implement power up/down sequence for internal UBM chip.
    This commit includes generic, platform independent part.

    CRs-Fixed: 255849
    Change-Id: I526c78765ba32b310463a231c5cf578cb37c6deb
    Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>

commit e1ba27311fcf3de2a5ca9a3fc1303328720dd120
Author: Nela Gurevich <nelag@codeaurora.org>
Date:   Thu Aug 19 14:00:09 2010 +0300

    csdio: Move csdio.h to kernel/include

    Change-Id: Idf8df750e9f3bcc014d1afa673c9c27c97253195
    Signed-off-by: Nela Gurevich <nelag@codeaurora.org>

commit 31d1b09c677c26efb71fa36ff6fe1e7f2d83abbc
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date:   Tue Aug 10 13:26:20 2010 +0300

    mmc: Char SDIO Device Driver

    The Char SDIO Device Driver is an interface which exposes an SDIO
    card/function from kernel space as a char device in user space.

    Change-Id: If298cdd6d4426b700e69affa5a3602cd221ad89c
    Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:22 -08:00
John Howe
ede9cdd93d hw_random: Add msm_rng driver
This is a combination of 13 commits.

 commit 59a27ca89fb515caeac2b97059832515566f70d9
 Author: John Howe <jhowe@codeaurora.org>
 Date:   Tue Jan 4 17:18:54 2011 -0500

    hw_random: Add Qualcomm MSM random number driver

    This driver uses the hardware random number generator on MSM chips.

    Change-Id: I13b4d831fb9b5487356af466536a9005107ff723
    Signed-off-by: John Howe <jhowe@codeaurora.org>

 commit 09cae33a80706e0aa77bdc4e1b493ef2a36dbbde
 Author: John Howe <jhowe@codeaurora.org>
 Date:   Fri Jan 14 10:21:05 2011 -0500

    hw_random: add PRNG clock control

    Change-Id: I6d9dd2ee7c50020fb8d41242b655e172e4c9eff2
    Signed-off-by: John Howe <jhowe@codeaurora.org>

 commit 0573eda3ce19c01825ded4fe850362c37460dc20
 Author: John Howe <jhowe@codeaurora.org>
 Date:   Mon Jan 24 14:56:06 2011 -0500

    hw_random: remove clk frequency control

    The clock only supports one rate, 64MHz, and is set to that
    rate by default.

    Change-Id: I820c74e44f4ebdec7b891a4c89d681cb5c3dcee6
    Signed-off-by: John Howe <jhowe@codeaurora.org>

 commit fab0a4d40e18be4a31a4720acafb128893c620e8
 Author: John Howe <jhowe@codeaurora.org>
 Date:   Tue Apr 12 14:48:51 2011 -0400

    hw_random: Use memory barriers

    Change-Id: Ie216141d7f6997266d8c5ed4bbd436f1be6551b8
    Signed-off-by: John Howe <jhowe@codeaurora.org>

 commit f07f1ba547790155db4c508ccfa58b64c967fe8e
 Author: Raj Kushwaha <rajk@codeaurora.org>
 Date:   Tue Jul 26 14:35:28 2011 -0700

    hw_random: msm: Remove PRNG hardware configuration

    LSFR and CONFIG registers are configured by secure domain
    code and XPU protected.

    CRs-Fixed: 284133
    Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
    (cherry picked from commit a4f802b0f5d0faee9e83020c599b2f4b0b27de5f)

    Change-Id: Ie73cc3a95d1e2fff970e4d71f15fc1cbb4ead11c
    Signed-off-by: Raj Kushwaha <rajk@codeaurora.org>

 commit 26cef0c9d572e55df0f17dc4a5de380595eddaeb
 Author: Matt Wagantall <mattw@codeaurora.org>
 Date:   Thu Aug 11 17:19:31 2011 -0700

    msm: clock: Use device names to distinguish between PRNG clocks

    Drivers should now use their device names to distinguish between
    clocks of the same type rather than the clock name. This allows
    the clock names to be updated to match the new naming convention.

    Change-Id: Ibf00fd3d406adb04299e3e79e379d4fefe70f2b4
    Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

 commit 5ad373931744ae98289ec680334d7cc0bee1c0b6
 Author: Ramesh Masavarapu <rameshm@codeaurora.org>
 Date:   Mon Oct 10 10:44:10 2011 -0700

    msm: Add PRNG to MSM9615 device.

    Add configuration parameters for MSM9615 device.
    PRNG hardware registers initialization in msm_rng.c is done
    currently for MSM9615.

    Change-Id: I2a05e9e582ce94a25bec71e1acaee95d62cd9469
    Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>

 commit 2f963dbc78c6c0703f51466b2b242287a2df5487
 Author: Ramesh Masavarapu <rameshm@codeaurora.org>
 Date:   Thu Oct 20 15:33:50 2011 -0700

    msm: Removed target specific changes for enabling PRNG h/w.

    The driver checks if the PRNG h/w is enabled. If it is not ON, it
    enables the PRNG h/w.

    Change-Id: I7c73eba7ba47f4fca116cfe0884758e6dd130ed0
    Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>

 commit 46af59fb8f4bce302ad4d787b63b25e46548df6a
 Author: Stepan Moskovchenko <stepanm@codeaurora.org>
 Date:   Tue Feb 7 14:38:59 2012 -0800

    msm: rng: Disable RNG init on APQ8064

    Change-Id: Ic42a85c51faea8a17b02eb4987d0f5db732716c2
    Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>

 commit a54263b0056b15cad1336a33d57bb1db013e8abb
 Author: Ramesh Masavarapu <rameshm@codeaurora.org>
 Date:   Wed Feb 1 22:49:01 2012 -0800

    msm: Removed XPU violations.

    During initialization, there is a violation in writing to
    "read only" registers for targets that support trust zone.
    Trustzone marks certain registers as read-only.
    This change fixes the issue by writing to registers only
    on targets that do not support trust zone.

    Change-Id: I69bb0f1bad199201aa3dd8b378ca1683dfa81c86
    Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>

 commit a99fcc24e94481134ca22f9778e88ed31646d6e3
 Author: Ramesh Masavarapu <rameshm@codeaurora.org>
 Date:   Wed Feb 22 14:30:32 2012 -0800

    Revert "msm: rng: Disable RNG init on APQ8064"

    This reverts commit 46af59fb8f4bce302ad4d787b63b25e46548df6a.
    The RNG driver was initially disabled because of missing clock
    changes and this driver was causing boot up issues.
    Now with the clock changes checked in the RNG driver works.

    Change-Id: I127f25c8be6b715510c1fb16b274a814416d8a8a
    Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>

 commit 801c392ab9ee2893c6f3ca506e43afa62798890b
 Author: Ramesh Masavarapu <rameshm@codeaurora.org>
 Date:   Tue Apr 24 16:28:00 2012 -0700

    prng: Replace clk_enable and clk_disable APIs.

    The clk driver has introduced new clock APIs that replace
    the existing clk_enable and clk_disable.
     -clk_enable() APIs is replaced with clk_prepare_enable().
     -clk_disable() API is replaced with clk_disable_unprepare().

    Change-Id: Ib6c452e7dc3f357497eae5a9302a7352a19fcb18
    Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>

 commit de991f08a8738dc66e65488aebed472de65ce237
 Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
 Date:   Thu May 31 13:15:51 2012 -0700

    PRNG: Device tree entry for qrng device.

    Cleanup platorm device entry & add device tree entry

    Change-Id: I5bde944d63276a3aaf00b7415066963027f11249
    Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>

 commit a4100a4a6e2a1843645d3eff22dabb387d4cbb61
 Author: Stephen Boyd <sboyd@codeaurora.org>
 Date:   Mon Jun 25 15:48:37 2012 -0700

    msm-rng: Fix PRNG_LFSR_CFG setup

    Changes to only configure the LFSR on devices that don't have the
    prng hardware already setup mistakenly removed the LFSR
    configuration. Instead, the change is ORing in 1s into the top 16
    bits of the register (they're marked as reserved).

    Restore the original code by masking off the lower 16 bits of the
    register and filling them with values from the
    PRNG_LFSR_CFG_CLOCKS define.

    Change-Id: Idd0df7b49175c211eec5ea778733ae81f5bc8188
    Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

commit 0bef6ede4b779c19091234e20ecfbb76a44edac0
Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
Date:   Wed Nov 7 19:47:21 2012 -0800

    msm: rng: Add support for iface clk

    Currently the driver supports only enabling core_clk,but on
    certain targets, iface_clk is used for the hardware RNG
    block. This fix adds compatibility to targets that have iface
    clock instead of the core clock.

    Change-Id: I480c3c7070e09f945439ea48e6877c7170ceeeb9
    Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:19 -08:00
Jeff Boody
1aa4bfe39e base: genlock: allow synchronization with a single gralloc handle
In order to support synchronization in a process with a single
gralloc handle we require the ability to write lock a buffer
while it is already read locked by the same handle. This change
extends the concept of an exclusive write lock or recursive read
locks to a genlock handle (rather than the genlock lock).
Genlock cannot provide deadlock protection because the same
handle can be used simultaneously by a producer and consumer.
In practice an error will still be generated when the timeout
expires.

CRs-fixed: 356263
Change-Id: I322e7fadc8b43287f53b211242b176d3de731db2
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:17 -08:00
Jordan Crouse
4c754ec211 base: genlock: Remove genlock_release_lock and associated ioctl
Allowing a lock to be asynchronously released while a handle
was still active turned out to be too dangerous to use in a
multi-threaded environment and it served no pratical
purpose anyway.  Handles now hold an attached lock until they
are destroyed.

CRs-fixed: 333141
Change-Id: Ic0dedbad8050ff01927ddb165c65a939bf297c10
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:16 -08:00
Jordan Crouse
52b721c846 drivers: base: Add generic cross-process locking API
Add a generic locking API for situations where multiple user-space
processes and/or kernel drivers need to cooordinate access to a
shared resource such as a graphics buffer.

Change-Id: Ic0dedbad74b970d7bd1a6624a845b5b1b9847443
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:29:12 -08:00
Stephen Boyd
84d1c1a3a3 Merge branch 'goog/googly' (early part) into goog/msm-soc-3.4
Fix NR_IPI to be 7 instead of 6 because both googly and core add
an IPI.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:
	arch/arm/Kconfig
	arch/arm/common/Makefile
	arch/arm/include/asm/hardware/cache-l2x0.h
	arch/arm/mm/cache-l2x0.c
	arch/arm/mm/mmu.c
	include/linux/wakelock.h
	kernel/power/Kconfig
	kernel/power/Makefile
	kernel/power/main.c
	kernel/power/power.h
2013-02-25 11:25:46 -08:00
Marc Zyngier
c00c85cb6d ARM: architected timers: add DT support
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Conflicts:
        [Resolve conflicts for adding support for the feature
         ARCH_HAS_READ_CURRENT_TIMER]
	arch/arm/kernel/arch_timer.c

Change-Id: I4b1d1dc2a8c69466497423475f7a3dd4d2c380c1
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
(cherry picked from commit f2caa5109ee0ce7d988d864207e06fdb19e75c39)
2013-02-20 02:49:15 -08:00
Rick Adams
e8605d39a3 msm: 8x55: put reason for boot in procfs from SMEM
During board initialization read the shared memory item
SMEM_POWER_ON_STATUS_INFO and place it in the procfs at
/proc/sys/kernel/boot_reason

The data item is an integer with a bit being set to identify the reason
the device was powered on. The values of this data item is defined in
the document Document/arm/msm/boot.txt, the following is the data in the
documentation file.

power_on_status values set by the PMIC for power on event:
----------------------------------------------------------
0x01 -- keyboard power on
0x02 -- RTC alarm
0x04 -- cable power on
0x08 -- SMPL
0x10 -- Watch Dog timeout
0x20 -- USB charger
0x40 -- Wall charger
0xFF -- error reading power_on_status value

This is change is a response to a customer request described in
JIRA KERNEL-518

Change-Id: I59e665f92e6e29f7dfef4380314f676a2d92c94b
Signed-off-by: Rick Adams <rgadams@codeaurora.org>
(cherry picked from commit 9512d7e26abc9d23a1771533c5300605d70dfaa7)

Conflicts:

	arch/arm/include/asm/processor.h
	arch/arm/mach-msm/board-msm7x30.c
	kernel/sysctl.c
2013-02-08 15:14:28 -08:00
Colin Cross
5500e4fab2 Merge commit 'v3.4' into android-3.4 2012-05-25 13:56:28 -07:00
Daniel Vetter
d4e8b7193d dma-buf: mmap support
Compared to Rob Clark's RFC I've ditched the prepare/finish hooks
and corresponding ioctls on the dma_buf file. The major reason for
that is that many people seem to be under the impression that this is
also for synchronization with outstanding asynchronous processsing.
I'm pretty massively opposed to this because:

- It boils down reinventing a new rather general-purpose userspace
  synchronization interface. If we look at things like futexes, this
  is hard to get right.
- Furthermore a lot of kernel code has to interact with this
  synchronization primitive. This smells a look like the dri1 hw_lock,
  a horror show I prefer not to reinvent.
- Even more fun is that multiple different subsystems would interact
  here, so we have plenty of opportunities to create funny deadlock
  scenarios.

I think synchronization is a wholesale different problem from data
sharing and should be tackled as an orthogonal problem.

Now we could demand that prepare/finish may only ensure cache
coherency (as Rob intended), but that runs up into the next problem:
We not only need mmap support to facilitate sw-only processing nodes
in a pipeline (without jumping through hoops by importing the dma_buf
into some sw-access only importer), which allows for a nicer
ION->dma-buf upgrade path for existing Android userspace. We also need
mmap support for existing importing subsystems to support existing
userspace libraries. And a loot of these subsystems are expected to
export coherent userspace mappings.

So prepare/finish can only ever be optional and the exporter /needs/
to support coherent mappings. Given that mmap access is always
somewhat fallback-y in nature I've decided to drop this optimization,
instead of just making it optional. If we demonstrate a clear need for
this, supported by benchmark results, we can always add it in again
later as an optional extension.

Other differences compared to Rob's RFC is the above mentioned support
for mapping a dma-buf through facilities provided by the importer.
Which results in mmap support no longer being optional.

Note that this dma-buf mmap patch does _not_ support every possible
insanity an existing subsystem could pull of with mmap: Because it
does not allow to intercept pagefaults and shoot down ptes importing
subsystems can't add some magic of their own at these points (e.g. to
automatically synchronize with outstanding rendering or set up some
special resources). I've done a cursory read through a few mmap
implementions of various subsytems and I'm hopeful that we can avoid
this (and the complexity it'd bring with it).

Additonally I've extended the documentation a bit to explain the hows
and whys of this mmap extension.

In case we ever want to add support for explicitly cache maneged
userspace mmap with a prepare/finish ioctl pair, we could specify that
userspace needs to mmap a different part of the dma_buf, e.g. the
range starting at dma_buf->size up to dma_buf->size*2. This works
because the size of a dma_buf is invariant over it's lifetime. The
exporter would obviously need to fall back to coherent mappings for
both ranges if a legacy clients maps the coherent range and the
architecture cannot suppor conflicting caching policies. Also, this
would obviously be optional and userspace needs to be able to fall
back to coherent mappings.

v2:
- Spelling fixes from Rob Clark.
- Compile fix for !DMA_BUF from Rob Clark.
- Extend commit message to explain how explicitly cache managed mmap
  support could be added later.
- Extend the documentation with implementations notes for exporters
  that need to manually fake coherency.

Change-Id: Ia8f2ae5d8a1b1c87ed12ca1c89d7bf2067239ee4
Cc: Rob Clark <rob.clark@linaro.org>
Cc: Rebecca Schultz Zavin <rebecca@android.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-22 14:01:06 -07:00
Linus Torvalds
b6255ee3d8 Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
 "For a some fix patches for v3.4, including a regression fix at DVB core"

Fix up trivial conflicts in Documentation/feature-removal-schedule.txt

* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
  [media] gspca - sonixj: Fix a zero divide in isoc interrupt
  [media] media: videobuf2-dma-contig: include header for exported symbols
  [media] media: videobuf2-dma-contig: quiet sparse noise about plain integer as NULL pointer
  [media] media: vb2-memops: Export vb2_get_vma symbol
  [media] s5p-fimc: Correct memory allocation for VIDIOC_CREATE_BUFS
  [media] s5p-fimc: Fix locking in subdev set_crop op
  [media] dvb_frontend: fix a regression with DVB-S zig-zag
  [media] fintek-cir: change || to &&
  [media] V4L: Schedule V4L2_CID_HCENTER, V4L2_CID_VCENTER controls for removal
  [media] rc: Postpone ISR registration
  [media] marvell-cam: fix an ARM build error
  [media] V4L: soc-camera: protect hosts during probing from overzealous user-space
2012-05-14 11:23:37 -07:00
Colin Cross
f02fac6330 Merge commit 'v3.4-rc6' into android-3.4
Conflicts:
	arch/arm/mm/cache-l2x0.c
	arch/arm/mm/mmu.c

Change-Id: If4f371a21c052fa597d107c44b128a093e4a8b91
2012-05-07 18:20:34 -07:00
Linus Torvalds
1c2f954806 Merge tag 'sound-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound sound fixes from Takashi Iwai:
 "As good as nothing exciting here; just a few trivial fixes for various
  ASoC stuff."

* tag 'sound-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ASoC: omap-pcm: Free dma buffers in case of error.
  ASoC: s3c2412-i2s: Fix dai registration
  ASoC: wm8350: Don't use locally allocated codec struct
  ASoC: tlv312aic23: unbreak resume
  ASoC: bf5xx-ssm2602: Set DAI format
  ASoC: core: check of_property_count_strings failure
  ASoC: dt: sgtl5000.txt: Add description for 'reg' field
  ASoC: wm_hubs: Make sure we don't disable differential line outputs
2012-05-05 10:07:06 -07:00
Takashi Iwai
20c76945d0 Merge tag 'asoc-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for 3.4

Nothing terribly exciting here, a bunch of small and simple fixes
scattered around the place.
2012-05-05 11:25:17 +02:00
Todd Poynor
2e739a0791 cpufreq: interactive: add boost pulse interface
Change-Id: Icf1e86d2065cc8f0816ba9c6b065eb056d4e8249
Signed-off-by: Todd Poynor <toddpoynor@google.com>
2012-05-03 17:41:51 -07:00
Linus Torvalds
6b4c555a6b Merge tag 'tag/upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
Pull libata fixes from Jeff Garzik:

1) Fix regression that could cause a misdiagnosis, which in turn could
   lead to an erroneous 3.0 Gbps -> 1.5 downshift, particularly when hotplug
   and suspend/resume is involved.

2) Fix a regression that led to ata%d controller ids being numbered one
   larger than in <= 3.4-rc3 (oh, the horror!).  Controller ids should now be
   as expected.

3) add some DT, PCI id's

4) ata/pata_arasan_cf: minor cpp fixing/cleaning

* tag 'tag/upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  ata: ahci_platform: Add synopsys ahci controller in DT's compatible list
  ata/pata_arasan_cf: Move arasan_cf_pm_ops out of #ifdef, #endif macros
  libata: init ata_print_id to 0
  ahci: Detect Marvell 88SE9172 SATA controller
  libata: skip old error history when counting probe trials
2012-05-03 17:16:52 -07:00
Linus Torvalds
c42f1d4b52 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:

 1) Transfer padding was wrong for full-speed USB in ASIX driver, fix
    from Ingo van Lil.

 2) Propagate the negative packet offset fix into the PowerPC BPF JIT.
    From Jan Seiffert.

 3) dl2k driver's private ioctls were letting unprivileged tasks make
    MII writes and other ugly bits like that.  Fix from Jeff Mahoney.

 4) Fix TX VLAN and RX packet drops in ucc_geth, from Joakim Tjernlund.

 5) OOPS and network namespace fixes in IPVS from Hans Schillstrom and
    Julian Anastasov.

 6) Fix races and sleeping in locked context bugs in drop_monitor, from
    Neil Horman.

 7) Fix link status indication in smsc95xx driver, from Paolo Pisati.

 8) Fix bridge netfilter OOPS, from Peter Huang.

 9) L2TP sendmsg can return on error conditions with the socket lock
    held, oops.  Fix from Sasha Levin.

10) udp_diag should return meaningful values for socket memory usage,
    from Shan Wei.

11) Eric Dumazet is so awesome he gets his own section:

       Socket memory cgroup code (I never should have applied those
       patches, grumble...) made erroneous changes to
       sk_sockets_allocated_read_positive().  It was changed to
       use percpu_counter_sum_positive (which requires BH disabling)
       instead of percpu_counter_read_positive (which does not).
       Revert back to avoid crashes and lockdep warnings.

       Adjust the default tcp_adv_win_scale and tcp_rmem[2] values
       to fix throughput regressions.  This is necessary as a result
       of our more precise skb->truesize tracking.

       Fix SKB leak in netem packet scheduler.

12) New device IDs for various bluetooth devices, from Manoj Iyer,
    AceLan Kao, and Steven Harms.

13) Fix command completion race in ipw2200, from Stanislav Yakovlev.

14) Fix rtlwifi oops on unload, from Larry Finger.

15) Fix hard_mtu when adjusting hard_header_len in smsc95xx driver.
    From Stephane Fillod.

16) ehea driver registers it's IRQ before all the necessary state is
    setup, resulting in crashes.  Fix from Thadeu Lima de Souza
    Cascardo.

17) Fix PHY connection failures in davinci_emac driver, from Anatolij
    Gustschin.

18) Missing break; in switch statement in bluetooth's
    hci_cmd_complete_evt().  Fix from Szymon Janc.

19) Fix queue programming in iwlwifi, from Johannes Berg.

20) Interrupt throttling defaults not being actually programmed into the
    hardware, fix from Jeff Kirsher and Ying Cai.

21) TLAN driver SKB encoding in descriptor busted on 64-bit, fix from
    Benjamin Poirier.

22) Fix blind status block RX producer pointer deref in TG3 driver, from
    Matt Carlson.

23) Promisc and multicast are busted on ehea, fixes from Thadeu Lima de
    Souza Cascardo.

24) Fix crashes in 6lowpan, from Alexander Smirnov.

25) tcp_complete_cwr() needs to be careful to not rewind the CWND to
    ssthresh if ssthresh has the "infinite" value.  Fix from Yuchung
    Cheng.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (81 commits)
  sungem: Fix WakeOnLan
  tcp: change tcp_adv_win_scale and tcp_rmem[2]
  net: l2tp: unlock socket lock before returning from l2tp_ip_sendmsg
  drop_monitor: prevent init path from scheduling on the wrong cpu
  usbnet: fix failure handling in usbnet_probe
  usbnet: fix leak of transfer buffer of dev->interrupt
  ucc_geth: Add 16 bytes to max TX frame for VLANs
  net: ucc_geth, increase no. of HW RX descriptors
  netem: fix possible skb leak
  sky2: fix receive length error in mixed non-VLAN/VLAN traffic
  sky2: propogate rx hash when packet is copied
  net: fix two typos in skbuff.h
  cxgb3: Don't call cxgb_vlan_mode until q locks are initialized
  ixgbe: fix calling skb_put on nonlinear skb assertion bug
  ixgbe: Fix a memory leak in IEEE DCB
  igbvf: fix the bug when initializing the igbvf
  smsc75xx: enable mac to detect speed/duplex from phy
  smsc75xx: declare smsc75xx's MII as GMII capable
  smsc75xx: fix phy interrupt acknowledge
  smsc75xx: fix phy init reset loop
  ...
2012-05-03 17:10:39 -07:00
Viresh Kumar
5f098a3ea7 ata: ahci_platform: Add synopsys ahci controller in DT's compatible list
SPEAr13xx series of SoCs contain Synopsys AHCI SATA Controller which shares
ahci_platform driver with other controller versions.

This patch updates DT compatible list for ahci_platform. It also updates and
renames binding documentation to more generic name.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2012-05-03 14:08:53 -04:00
Eric Dumazet
b49960a05e tcp: change tcp_adv_win_scale and tcp_rmem[2]
tcp_adv_win_scale default value is 2, meaning we expect a good citizen
skb to have skb->len / skb->truesize ratio of 75% (3/4)

In 2.6 kernels we (mis)accounted for typical MSS=1460 frame :
1536 + 64 + 256 = 1856 'estimated truesize', and 1856 * 3/4 = 1392.
So these skbs were considered as not bloated.

With recent truesize fixes, a typical MSS=1460 frame truesize is now the
more precise :
2048 + 256 = 2304. But 2304 * 3/4 = 1728.
So these skb are not good citizen anymore, because 1460 < 1728

(GRO can escape this problem because it build skbs with a too low
truesize.)

This also means tcp advertises a too optimistic window for a given
allocated rcvspace : When receiving frames, sk_rmem_alloc can hit
sk_rcvbuf limit and we call tcp_prune_queue()/tcp_collapse() too often,
especially when application is slow to drain its receive queue or in
case of losses (netperf is fast, scp is slow). This is a major latency
source.

We should adjust the len/truesize ratio to 50% instead of 75%

This patch :

1) changes tcp_adv_win_scale default to 1 instead of 2

2) increase tcp_rmem[2] limit from 4MB to 6MB to take into account
better truesize tracking and to allow autotuning tcp receive window to
reach same value than before. Note that same amount of kernel memory is
consumed compared to 2.6 kernels.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Neal Cardwell <ncardwell@google.com>
Cc: Tom Herbert <therbert@google.com>
Cc: Yuchung Cheng <ycheng@google.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-02 21:08:58 -04:00